CLC5523I

更新时间： 2024-02-14 23:11:43

品牌	Logo	应用领域
美国国家半导体 - NSC		放大器
页数	文件大小	规格书
12页	157K
描述
Low-Power, Variable Gain Amplifier

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中文翻译

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技术参数
数据手册

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CLC5523I 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Active	零件包装代码：	DIP
包装说明：	DIP,	针数：	8
Reach Compliance Code：	unknown	风险等级：	5.65
模拟集成电路 - 其他类型：	ANALOG CIRCUIT	JESD-30 代码：	R-PDIP-T8
JESD-609代码：	e0	长度：	9.817 mm
湿度敏感等级：	NOT SPECIFIED	标称负供电电压 (Vsup)：	-5 V
功能数量：	1	端子数量：	8
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	DIP
封装形状：	RECTANGULAR	封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	座面最大高度：	5.08 mm
标称供电电压 (Vsup)：	5 V	表面贴装：	NO
温度等级：	INDUSTRIAL	端子面层：	TIN LEAD
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7.62 mm	Base Number Matches：	1

CLC5523I 数据手册

CLC5523 Operation

The key features of the CLC5523 are:

Using the CLC5523 in AGC Applications

In AGC applications, the control loop forces the CLC5523

to have a fixed output amplitude. The input amplitude will

vary over a wide range and this can be the issue that

limits dynamic range. At high input amplitudes, the

■

Low Power

■

Broad voltage controlled gain and attenuation

range

Bandwidth independent, resistor programmable

gain range

Broad signal and gain control bandwidths

Frequency response may be adjusted with R

High Impedance signal and gain control Inputs

■

distortion due to the input buffer driving R may exceed

that which is produced by the output amplifier driving the

load. In the plot, Harmonic Distortion vs. Gain, second

and third harmonic distortion are plotted over a gain

range of nearly 40dB for a fixed output amplitude

■

of 100mV

in the specified configuration, R = 1k,

The CLC5523 combines a closed loop input buffer, a volt-

age controlled variable gain cell and an output amplifier.

The input buffer is a transconductance stage whose gain

R = 100W. When the gain is adjusted to 0.1 (i.e. 40dB

down from A

), the input amplitude would be 1V and

vmax

we can see the distortion is at its worst at this gain. If the

output amplitude of the AGC were to be raised above

100mV, the input amplitudes for gains 40dB down from

is set by the gain setting resistor, R . The output amplifi-

er is a current feedback op amp and is configured as a

transimpedance stage whose gain is set by, and equal to,

would be even higher and the distortion would

vmax

the feedback resistor, R . The maximum gain, A

, of

vmax

degrade further. It is for this reason that we recommend

lower output amplitudes if wide gain ranges are desired.

Using a post-amp like the CLC404 or CLC409 would be

the best way to preserve dynamic range and yield output

the CLC5523 is defined by the ratio; R / R . As the

gain control input (V ) is adjusted over its 0 to 2V range,

the gain is adjusted over a range of 80dB relative to the

maximum set gain.

amplitudes much higher than 100mV .

Setting the CLC5523 Maximum Gain

Another way of addressing distortion performance and

its limitations on dynamic range, would be to raise the

vmax

value of R . Just like any other high-speed amplifier, by

increasing the load resistance, and therefore decreasing

the demanded load current, the distortion performance

Although the CLC5523 is specified at A

= 10, the

vmax

will be improved in most cases. With an increased R , R

recommended A

varies between 2 and 100. Higher

vmax

will also have to be increased to keep the same A

and this will decrease the overall bandwidth.

vmax

gains are possible but usually impractical due to

output offsets, noise and distortion. When varying A

several tradeoffs are made:

vmax

Gain Partitioning

R : determines the input voltage range

If high levels of gain are needed, gain partitioning should

be considered.

R : determines overall bandwidth

The amount of current which the input buffer can source

V_G

into R is limited and is specified in the I

sets the maximum input voltage:

spec. This

R max

V_in

25Wž

CLC425

V_o

R_c

V (max) = I

× R

CLC5523

R_gmax

R₂

R_f

The effects of maximum input range on harmonic distortion

are illustrated in the Input Harmonic Distortion plot.

R₁

R_g

25W

Variations in R will also have an effect on the small

signal bandwidth due to its loading of the input buffer and

can be seen in Frequency Response vs. R . Changes in

R will have a more dramatic effect on the small signal

bandwidth. The output amplifier of the CLC5523 is a

current feedback amplifier(CFA) and its bandwidth is

Figure 1: Gain Partitioning

The maximum gain range for this circuit is given by the

following equation:

determined by R . As with any CFA, doubling the feed-

back resistor will roughly cut the bandwidth of the device

in half (refer to the plot Frequency Response vs. R ). For

information

covering

CFA’s,

there

maximum gain = 1+

÷ ç

a basic tutorial, OA-20, Current Feedback Myths

Debunked or a more rigorous analysis, OA-13, Current

Feedback Amplifier Loop Gain Analysis and Performance

Enhancements.

http://www.national.com

1 2 3 456 7 8...12

中文翻译

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与CLC5523I相关器件

型号	品牌	获取价格	描述	数据表
CLC5523IM	NSC	获取价格	Low-Power, Variable Gain Amplifier
CLC5523IMX	NSC	获取价格	Low-Power, Variable Gain Amplifier
CLC5523IN	NSC	获取价格	Low-Power, Variable Gain Amplifier
CLC5526	NSC	获取价格	Digital Variable Gain Amplifier (DVGA)
CLC5526MSA	NSC	获取价格	Digital Variable Gain Amplifier (DVGA)
CLC5526MSA/NOPB	TI	获取价格	SPECIALTY ANALOG CIRCUIT, PDSO20, LEAD FREE, SSOP-20
CLC5526MSAX	ETC	获取价格	Single Differential Amplifier
CLC5526MSAX/NOPB	TI	获取价格	IC,DIGITALLY CONTROLLED GAIN AMPLIFIER,SSOP,20PIN,PLASTIC
CLC5526PCASM	NSC	获取价格	Digital Variable Gain Amplifier (DVGA)
CLC5602	NSC	获取价格	Dual, High Output, Video Amplifier

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