CDP68HC68T1
CMOS Serial Real-Time Clock With
RAM and Power Sense/Control
August 1997
Features
Pinouts
CDP68HC68T1 (PDIP, SBDIP, SOIC)
• SPI (Serial Peripheral Interface)
• Full Clock Features
TOP VIEW
- Seconds, Minutes, Hours (12/24, AM/PM), Day of
Week, Date, Month, Year (0-99), Automatic Leap Year
1
2
3
4
5
6
7
8
CLKOUT
CPUR
INT
16
15
V
DD
XTAL OUT
• 32 Word x 8-Bit RAM
14 XTAL IN
• Seconds, Minutes, Hours Alarm
SCK
13
12
V
V
BATT
SYS
• Automatic Power Loss Detection
• Low Minimum Standby (Timekeeping) Voltage. . . 2.2V
• Selectable Crystal or 50/60Hz Line Input
• Buffered Clock Output
MOSI
MISO
11 LINE
10 POR
CE
V
9
PSE
SS
• Battery Input Pin that Powers Oscillator and also
Connects to V
Pin When Power Fails
DD
CDP68HC68T1 (SOIC)
TOP VIEW
• Three Independent Interrupt Modes
- Alarm
1
2
3
4
5
6
7
8
9
CLK OUT
CPUR
INT
20 VDD
- Periodic
XTAL OUT
19
- Power-Down Sense
18 XTAL IN
17
NC
Description
NC
SCK
16
15
V
V
BATT
The CDP68HC68T1 Real-Time Clock provides
a
time/calendar function, a 32 byte static RAM, and a 3 wire
Serial Peripheral Interface (SPI Bus). The primary function of
the clock is to divide down a frequency input that can be
supplied by the on-board oscillator in conjunction with an
external crystal or by an external clock source. The internal
oscillator can operate with a 32KHz, 1MHz, 2MHz, or 4MHz
crystal. An external clock source with a 32KHz, 1MHz,
2MHz, 4MHz, 50Hz or 60Hz frequency can be used to drive
the CDP68HC68T1. The time registers hold seconds,
minutes, and hours, while the calendar registers hold day-of-
week, date, month, and year information. The data is stored
in BCD format. In addition, 12 or 24 hour operation can be
selected. In 12 hour mode, an AM/PM indicator is provided.
The T1 has a programmable output which can provide one
of seven outputs for use elsewhere in the system.
MOSI
SYS
MISO
CE
14 NC
13 NC
12
V
LINE
SS
PSE 10
11
POR
Ordering Information
TEMP.
o
PKG.
NO.
PART NUMBER
CDP68HC68T1E
CDP68HC68T1D
CDP68HC68T1M
CDP68HC68T1M2
CDP68HC68T1W
RANGE ( C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
PACKAGE
16 Ld PDIP
16 Ld SBDIP
20 Ld SOIC
16 Ld SOIC
DIE
E16.3
D16.3
M20.3
M16.3
Computer handshaking is controlled with a “wired-OR”
interrupt output. The interrupt can be programmed to provide
a signal as the result of: 1) an alarm programmed to occur at
a predetermined combination of seconds, minutes, and
hours; 2) one of 15 periodic interrupts ranging from sub-
second to once per day frequency; 3) a power fail detect.
NOTE: Pin number references throughout this specification refer to
the 16 lead PDIP/SBDIP/SOIC. See pinouts for cross reference.
The PSE output and the V
input are used for external
SYS
power control. The CPUR output is available to reset the
processor under power-down conditions. CPUR is enabled
under software control and can also be activated via the
CDP68HC68T1’s watchdog. If enabled, the watchdog
requires a periodic toggle of the CE pin without a serial
transfer.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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