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CD74HCT280E

更新时间： 2024-02-20 14:12:37
品牌 Logo 应用领域
德州仪器 - TI 运算电路
页数 文件大小 规格书
9页 261K
描述
High-Speed CMOS Logic 9-Bit Odd/Even Parity Generator/Checker

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中文翻译

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CD74HCT280E 技术参数

生命周期：Transferred包装说明：,
Reach Compliance Code：unknown风险等级：5.69
Is Samacsys：NBase Number Matches：1

CD74HCT280E 数据手册

 浏览型号CD74HCT280E的Datasheet PDF文件第2页浏览型号CD74HCT280E的Datasheet PDF文件第3页浏览型号CD74HCT280E的Datasheet PDF文件第4页浏览型号CD74HCT280E的Datasheet PDF文件第5页浏览型号CD74HCT280E的Datasheet PDF文件第6页浏览型号CD74HCT280E的Datasheet PDF文件第7页 
CD54HC280, CD74HC280,  
CD54HCT280, CD74HCT280  
Data sheet acquired from Harris Semiconductor  
SCHS175D  
High-Speed CMOS Logic  
9-Bit Odd/Even Parity Generator/Checker  
November 1997 - Revised October 2003  
Features  
Description  
• Typical Propagation Delay = 17ns at V  
o
= 5V,  
The ’HC280 and ’HCT280 are 9-bit odd/even parity, generator  
checker devices. Both even and odd parity outputs are  
available for checking or generating parity for words up to nine  
bits long. Even parity is indicated (ΣE output is high) when an  
even number of data inputs is high. Odd parity is indicated  
(ΣO output is high) when an odd number of data inputs is  
high. Parity checking for words larger than 9 bits can be  
accomplished by tying the ΣE output to any input of an  
additional HC/HCT280 parity checker.  
CC  
C = 15pF, T = 25 C  
L
A
[ /Title  
(CD74  
HC280  
,
• Replaces LS180 Types  
• Easily Cascadable  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
CD74  
HCT28  
0)  
/Sub-  
ject  
(High  
Speed  
CMOS  
Logic  
9-Bit  
Odd/E  
ven  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
Ordering Information  
TEMP. RANGE  
o
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
PART NUMBER  
CD54HC280F3A  
CD54HCT280F3A  
CD74HC280E  
( C)  
PACKAGE  
14 Ld CERDIP  
14 Ld CERDIP  
14 Ld PDIP  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• HC Types  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
CC  
CD74HC280MT  
CD74HC280M96  
CD74HCT280E  
14 Ld SOIC  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
14 Ld SOIC  
14 Ld PDIP  
Parity  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel. The suffix T denotes a small-quantity reel  
of 250.  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
l
OL OH  
Pinout  
Functional Diagram  
CD54HC280, CD54HCT280  
(CERDIP)  
8
I0  
CD74HC280  
(PDIP, SOIC)  
CD74HCT280  
(PDIP)  
9
I1  
10  
I2  
5
∑ EVEN  
TOP VIEW  
11  
I3  
12  
I6  
I7  
1
2
3
4
5
6
7
14 V  
CC  
I4  
I5  
I6  
6
∑ ODD  
13  
1
13 I5  
12 I4  
11 I3  
10 I2  
NC  
I8  
2
4
I7  
I8  
GND = 7  
= 14  
ΣE  
V
CC  
NC = 3  
ΣO  
GND  
9
8
I1  
I0  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1
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中文翻译

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CD74HCT280E 替代型号

型号 品牌 替代类型 描述 数据表
CD54HC280F3A TI

完全替代

 High-Speed CMOS Logic 9-Bit Odd/Even Parity Generator/Checker
SN74LS280N TI

类似代替

 9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS
8406401EA TI

类似代替

 High-Speed CMOS Logic 10- to 4-Line Priority Encoder

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CD74HCT280E96 RENESAS

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 		HCT SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, PDIP14, PLASTIC, DIP-14
CD74HCT280EE4 TI

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 		High-Speed CMOS Logic 9-Bit Odd/Even Parity Generator/Checker
CD74HCT280EE4 MICROSEMI

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CD74HCT280EN ETC

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 		Logic IC
CD74HCT280EX RENESAS

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 		Parity Generator/Checker, HCT Series, 9-Bit, Complementary Output, CMOS, PDIP14
CD74HCT280F ETC

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 		Logic IC
CD74HCT280H ETC

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 		Parity Generator/Checker
CD74HCT280M RENESAS

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 		IC,PARITY GENERATOR/CHECKER,HCT-CMOS,SOP,14PIN,PLASTIC
CD74HCT280M96 RENESAS

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 		IC,PARITY GENERATOR/CHECKER,HCT-CMOS,SOP,14PIN,PLASTIC
CD74HCT283 TI

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 		High Speed CMOS Logic 4-Bit Binary Full Adder with Fast Carry

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