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CD74HCT173MT PDF预览

CD74HCT173MT

更新时间： 2024-11-01 22:34:51
品牌 Logo 应用领域
德州仪器 - TI 触发器
页数 文件大小 规格书
17页 372K
描述
High-Speed CMOS Logic Quad D-Type Flip-Flop, Three-State

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CD74HCT173MT 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP, SOP16,.25针数：16
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：5.45
其他特性：WITH DUAL OUTPUT ENABLE系列：HCT
JESD-30 代码：R-PDSO-G16JESD-609代码：e4
长度：9.9 mm负载电容（CL）：50 pF
逻辑集成电路类型：D FLIP-FLOP最大频率@ Nom-Sup：13000000 Hz
最大I（ol）：0.006 A湿度敏感等级：1
位数：4功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：260
电源：5 V传播延迟（tpd）：60 ns
认证状态：Not Qualified座面最大高度：1.75 mm
子类别：FF/Latches最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：POSITIVE EDGE宽度：3.9 mm
最小 fmax：13 MHz

CD74HCT173MT 数据手册

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CD54HC173, CD74HC173,  
CD54HCT173, CD74HCT173  
Data sheet acquired from Harris Semiconductor  
SCHS158E  
High-Speed CMOS Logic  
Quad D-Type Flip-Flop, Three-State  
February 1998 - Revised October 2003  
Features  
Description  
The ’HC173 and ’HCT173 high speed three-state quad D-  
type flip-flops are fabricated with silicon gate CMOS technol-  
ogy. They possess the low power consumption of standard  
CMOS Integrated circuits, and can operate at speeds com-  
• Three-State Buffered Outputs  
• Gated Input and Output Enables  
• Fanout (Over Temperature Range)  
[ /Title  
(CD74H  
C173,  
CD74H  
CT173)  
/Subject  
(High  
Speed  
CMOS  
Logic  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads parable to the equivalent low power Schottky devices. The  
buffered outputs can drive 15 LSTTL loads. The large output  
drive capability and three-state feature make these parts ide-  
ally suited for interfacing with bus lines in bus oriented sys-  
tems.  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
The four D-type flip-flops operate synchronously from a com-  
mon clock. The outputs are in the three-state mode when  
either of the two output disable pins are at the logic “1” level.  
The input ENABLES allow the flip-flops to remain in their  
present states without having to disrupt the clock If either of  
the 2 input ENABLES are taken to a logic “1” level, the Q  
outputs are fed back to the inputs, forcing the flip-flops to  
remain in the same state. Reset is enabled by taking the  
MASTER RESET (MR) input to a logic “1” level. The data  
outputs change state on the positive going edge of the clock.  
• HC Types  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30% of V  
CC  
IL  
IH  
at V  
= 5V  
CC  
Quad D-  
Type  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
l
OL OH  
The ’HCT173 logic family is functionally, as well as pin com-  
patible with the standard LS logic family.  
Ordering Information  
Pinout  
CD54HC173, CD54HCT173  
(CERDIP)  
CD74HC173  
(PDIP, SOIC, SOP, TSSOP)  
CD74HCT173  
TEMP. RANGE  
o
PART NUMBER  
CD54HC173F3A  
CD54HCT173F3A  
CD74HC173E  
( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld CERDIP  
16 Ld PDIP  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
(PDIP, SOIC)  
TOP VIEW  
OE  
1
2
3
4
5
6
7
8
16 V  
CC  
CD74HC173M  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOP  
15 MR  
14 D0  
13 D1  
12 D2  
11 D3  
10 E2  
OE2  
CD74HC173MT  
CD74HC173M96  
CD74HC173NSR  
CD74HC173PW  
CD74HC173PWR  
CD74HC173PWT  
CD74HCT173E  
CD74HCT173M  
CD74HCT173MT  
CD74HCT173M96  
Q
Q
Q
Q
0
1
2
3
16 Ld TSSOP  
16 Ld TSSOP  
16 Ld TSSOP  
16 Ld PDIP  
CP  
9
E1  
GND  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
NOTE: When ordering, use the entire part number. The suffixes 96  
and R denote tape and reel. The suffix T denotes a small-quantity  
reel of 250.  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1
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CD74HCT173MT 替代型号

型号 品牌 替代类型 描述 数据表
CD74HCT173MTE4 TI

完全替代

 High-Speed CMOS Logic Quad D-Type Flip-Flop, Three-State
CD74HCT173ME4 TI

完全替代

 High-Speed CMOS Logic Quad D-Type Flip-Flop, Three-State
CD74HCT173M96E4 TI

完全替代

 High-Speed CMOS Logic Quad D-Type Flip-Flop, Three-State

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