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CD74HCT175EE4 PDF预览

CD74HCT175EE4

更新时间: 2024-09-14 21:53:47
品牌 Logo 应用领域
德州仪器 - TI 触发器锁存器逻辑集成电路光电二极管PC
页数 文件大小 规格书
12页 277K
描述
High-Speed CMOS Logic Quad D-Type Flip-Flop with Reset

CD74HCT175EE4 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:DIP包装说明:DIP-16
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:5.12Samacsys Confidence:3
Samacsys Status:ReleasedSamacsys PartID:181214
Samacsys Pin Count:16Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Dual-In-Line PackagesSamacsys Footprint Name:N (R-PDIP-T16)
Samacsys Released Date:2015-06-25 00:00:00Is Samacsys:N
系列:HCTJESD-30 代码:R-PDIP-T16
JESD-609代码:e4长度:19.3 mm
负载电容(CL):50 pF逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:16000000 Hz最大I(ol):0.004 A
位数:4功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:COMPLEMENTARY
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE包装方法:TUBE
峰值回流温度(摄氏度):NOT APPLICABLE电源:5 V
最大电源电流(ICC):0.08 mAProp。Delay @ Nom-Sup:53 ns
传播延迟(tpd):50 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT APPLICABLE触发器类型:POSITIVE EDGE
宽度:6.35 mm最小 fmax:16 MHz
Base Number Matches:1

CD74HCT175EE4 数据手册

 浏览型号CD74HCT175EE4的Datasheet PDF文件第2页浏览型号CD74HCT175EE4的Datasheet PDF文件第3页浏览型号CD74HCT175EE4的Datasheet PDF文件第4页浏览型号CD74HCT175EE4的Datasheet PDF文件第5页浏览型号CD74HCT175EE4的Datasheet PDF文件第6页浏览型号CD74HCT175EE4的Datasheet PDF文件第7页 
CD54HC175, CD74HC175,  
CD54HCT175, CD74HCT175  
Data sheet acquired from Harris Semiconductor  
SCHS160C  
High-Speed CMOS Logic  
Quad D-Type Flip-Flop with Reset  
August 1997 - Revised October 2003  
advantage of standard CMOS ICs and the ability to drive 10  
LSTTL devices.  
Features  
• Common Clock and Asynchronous Reset on Four  
D-Type Flip-Flops  
Information at the D input is transferred to the Q, Q outputs on  
the positive going edge of the clock pulse. All four Flip-Flops  
are controlled by a common clock (CP) and a common reset  
(MR). Resetting is accomplished by a low voltage level  
independent of the clock. All four Q outputs are reset to a  
logic 0 and all four Q outputs to a logic 1.  
[ /Title  
(CD74  
HC175  
,
• Positive Edge Pulse Triggering  
• Complementary Outputs  
• Buffered Inputs  
CD74  
HCT17  
5)  
/Sub-  
ject  
(High  
Speed  
CMOS  
Logic  
Quad  
D-  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
Ordering Information  
TEMP. RANGE  
o
o
o
PART NUMBER  
CD54HC175F3A  
CD54HCT175F3A  
CD74HC175E  
( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld CERDIP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
• HC Types  
- 2V to 6V Operation  
CD74HC175M  
- High Noise Immunity: N = 30%, N = 30% of V  
CC  
IL  
IH  
CD74HC175MT  
CD74HC175M96  
CD74HCT175E  
CD74HCT175M  
CD74HCT175MT  
CD74HCT175M96  
at V  
= 5V  
CC  
• HCT Types  
- 4.5V to 5.5V Operation  
Type  
Flip-  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL  
IH  
- CMOS Input Compatibility, I 1µA at V , V  
l
OL OH  
Description  
The ’HC175 and ’HCT175 are high speed Quad D-type Flip-  
Flops with individual D-inputs and Q, Q complementary  
outputs. The devices are fabricated using silicon gate CMOS  
technology. They have the low power consumption  
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel. The suffix T denotes a small-quantity reel of  
250.  
Pinout  
CD54HC175, CD54HCT175  
(CERDIP)  
CD74HC175, CD74HCT175  
(PDIP, SOIC)  
TOP VIEW  
MR  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
CC  
Q
Q
0
3
3
3
2
Q
D
D
Q
Q
Q
0
0
1
1
1
D
D
Q
Q
2
2
CP  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1

CD74HCT175EE4 替代型号

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