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CD74HC4094M96G3 PDF预览

CD74HC4094M96G3

更新时间： 2024-01-17 11:46:05
品牌 Logo 应用领域
德州仪器 - TI 移位寄存器存储触发器逻辑集成电路光电二极管
页数 文件大小 规格书
19页 615K
描述
HIgh-Speed CMOS Logic 8-Stage Shift and Store Bus Register,Three-State

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CD74HC4094M96G3 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SOIC
包装说明：GREEN, PLASTIC, MS-012AC, SOIC-16针数：16
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：6 weeks风险等级：0.69
Is Samacsys：N计数方向：RIGHT
系列：HC/UHJESD-30 代码：R-PDSO-G16
JESD-609代码：e3长度：9.9 mm
负载电容（CL）：50 pF逻辑集成电路类型：SERIAL IN PARALLEL OUT
最大频率@ Nom-Sup：24000000 Hz最大I（ol）：0.0052 A
湿度敏感等级：1位数：8
功能数量：1端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP16,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE包装方法：TR
峰值回流温度（摄氏度）：260电源：2/6 V
最大电源电流（ICC）：0.08 mAProp。Delay @ Nom-Sup：33 ns
传播延迟（tpd）：295 ns认证状态：Not Qualified
施密特触发器：No座面最大高度：1.75 mm
子类别：Shift Registers最大供电电压 (Vsup)：6 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：4.5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：POSITIVE EDGE宽度：3.91 mm
Base Number Matches：1

CD74HC4094M96G3 数据手册

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CD54HC4094, CD74HC4094,  
CD74HCT4094  
Data sheet acquired from Harris Semiconductor  
SCHS211D  
High-Speed CMOS Logic  
8-Stage Shift and Store Bus Register, Three-State  
November 1997 - Revised October 2003  
Two serial outputs are available for cascading a number of  
Features  
• Buffered Inputs  
these devices. Data is available at the QS serial output  
1
terminal on positive clock edges to allow for high-speed  
operation in cascaded system in which the clock rise time is  
• Separate Serial Outputs Synchronous to Both  
Positive and Negative Clock Edges For Cascading  
[ /Title  
(CD74H  
C4094,  
CD74H  
CT4094  
)
/Sub-  
ject  
(High  
Speed  
CMOS  
Logic 8-  
fast. The same serial information, available at the QS  
2
terminal on the next negative clock edge, provides a means  
for cascading these devices when the clock rise time is slow.  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
Ordering Information  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
TEMP. RANGE  
o
PART NUMBER  
CD54HC4094F3A  
CD74HC4094E  
( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOP  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• HC Types  
- 2V to 6V Operation  
CD74HC4094M  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
CD74HC4094MT  
CD74HC4094M96  
CD74HC4094NSR  
CD74HC4094PW  
CD74HC4094PWR  
CD74HC4094PWT  
CD74HCT4094E  
CD74HCT4094M  
CD74HCT4094MT  
CD74HCT4094M96  
CC  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
16 Ld TSSOP  
16 Ld TSSOP  
16 Ld TSSOP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
OL OH  
l
Description  
The ’HC4094 and CD74HCT4094 are 8-stage serial shift  
registers having a storage latch associated with each stage  
for strobing data from the serial input to parallel buffered  
three-state outputs. The parallel outputs may be connected  
directly to common bus lines. Data is shifted on positive  
clock transitions. The data in each shift register stage is  
transferred to the storage register when the Strobe input is  
high. Data in the storage register appears at the outputs  
whenever the Output-Enable signal is high.  
NOTE: When ordering, use the entire part number. The suffixes 96  
and R denote tape and reel. The suffix T denotes a small-quantity  
reel of 250.  
Pinout  
CD54HC4094 (CERDIP)  
CD74HC4094 (PDIP, SOIC, SOP, TSSOP)  
CD74HCT4094 (PDIP, SOIC)  
TOP VIEW  
STROBE  
DATA  
CP  
1
2
3
4
5
6
7
8
16 V  
CC  
15 OE  
14 Q  
13 Q  
12 Q  
11 Q  
4
5
6
7
Q
Q
Q
Q
0
1
2
3
10 QS  
2
9
QS  
GND  
1
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1
1234567...19

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CD74HC4094M96G3 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC4094MT TI

类似代替

 		High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State
CD74HC4094M TI

类似代替

 		High Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

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