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CD74HC4094NSR96 PDF预览

CD74HC4094NSR96

更新时间: 2024-02-04 02:09:13
品牌 Logo 应用领域
其他 - ETC 移位寄存器
页数 文件大小 规格书
9页 53K
描述
SHIFT REGISTER|HC-CMOS|SOP|16PIN|PLASTIC

CD74HC4094NSR96 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP16,.3针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.08计数方向:RIGHT
系列:HC/UHJESD-30 代码:R-PDSO-G16
逻辑集成电路类型:SERIAL IN PARALLEL OUT最大频率@ Nom-Sup:4000000 Hz
位数:8功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:2/6 V传播延迟(tpd):295 ns
认证状态:Not Qualified子类别:Shift Registers
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
最小 fmax:24 MHzBase Number Matches:1

CD74HC4094NSR96 数据手册

 浏览型号CD74HC4094NSR96的Datasheet PDF文件第2页浏览型号CD74HC4094NSR96的Datasheet PDF文件第3页浏览型号CD74HC4094NSR96的Datasheet PDF文件第4页浏览型号CD74HC4094NSR96的Datasheet PDF文件第5页浏览型号CD74HC4094NSR96的Datasheet PDF文件第6页浏览型号CD74HC4094NSR96的Datasheet PDF文件第7页 
CD54/74HC4094,  
CD74HCT4094  
Data sheet acquired from Harris Semiconductor  
SCHS211B  
High Speed CMOS Logic  
8-Stage Shift and Store Bus Register, Three-State  
November 1997 - Revised March 2002  
directly to common bus lines. Data is shifted on positive  
clock transitions. The data in each shift register stage is  
transferred to the storage register when the Strobe input is  
high. Data in the storage register appears at the outputs  
Features  
• Buffered Inputs  
• Separate Serial Outputs Synchronous to Both  
Positive and Negative Clock Edges For Cascading  
[ /Title  
(CD74H  
C4094,  
CD74H  
CT4094  
)
/Sub-  
ject  
(High  
Speed  
CMOS  
Logic 8-  
whenever the Output-Enable signal is high.  
Two serial outputs are available for cascading a number of  
• Fanout (Over Temperature Range)  
these devices. Data is available at the QS serial output  
1
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
terminal on positive clock edges to allow for high-speed  
operation in cascaded system in which the clock rise time is  
fast. The same serial information, available at the QS  
2
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
terminal on the next negative clock edge, provides a means  
for cascading these devices when the clock rise time is slow.  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
Ordering Information  
TEMP. RANGE  
o
• HC Types  
PART NUMBER  
CD54HC4094F3A  
CD74HC4094E  
CD74HC4094M  
CD74HC4094NSR  
CD74HCT4094E  
CD74HCT4094M  
NOTES:  
( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOP  
- 2V to 6V Operation  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
CC  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
16 Ld PDIP  
16 Ld SOIC  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
Description  
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
The ’HC4094 and CD74HCT4094 are 8-stage serial shift  
registers having a storage latch associated with each stage  
for strobing data from the serial input to parallel buffered  
three-state outputs. The parallel outputs may be connected  
2. Wafer or die for this part number is available which meets all elec-  
trical specifications. Please contact your local TI sales office or  
customer service for ordering information.  
Pinout  
CD54HC4094  
(CERDIP)  
CD74HC4094  
(PDIP, SOIC, SOP)  
CD74HCT4094  
(PDIP, SOIC)  
TOP VIEW  
STROBE  
DATA  
CP  
1
2
3
4
5
6
7
8
16 V  
CC  
15 OE  
14 Q  
13 Q  
12 Q  
11 Q  
4
5
6
7
Q
Q
Q
Q
0
1
2
3
10 QS  
2
1
9
QS  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2002, Texas Instruments Incorporated  
1

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