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CD74HC390M96E4 PDF预览

CD74HC390M96E4

更新时间： 2024-01-05 03:12:20
品牌 Logo 应用领域
德州仪器 - TI 计数器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
11页 267K
描述
High-Speed CMOS Logic Dual Decade Ripple Counter

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CD74HC390M96E4 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOIC-16
针数：16Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.23
Is Samacsys：N其他特性：DIVIDE BY 2 AND DIVIDE BY 5 FUNCTIONS
计数方向：UP系列：HC/UH
JESD-30 代码：R-PDSO-G16JESD-609代码：e4
长度：9.9 mm负载电容（CL）：50 pF
负载/预设输入：YES逻辑集成电路类型：DECADE COUNTER
最大频率@ Nom-Sup：20000000 Hz最大I（ol）：0.004 A
工作模式：ASYNCHRONOUS湿度敏感等级：1
位数：4功能数量：2
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：260
电源：2/6 V传播延迟（tpd）：550 ns
认证状态：Not Qualified座面最大高度：1.75 mm
子类别：Counters最大供电电压 (Vsup)：6 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：4.5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
触发器类型：NEGATIVE EDGE宽度：3.9 mm
最小 fmax：24 MHzBase Number Matches：1

CD74HC390M96E4 数据手册

 浏览型号CD74HC390M96E4的Datasheet PDF文件第2页浏览型号CD74HC390M96E4的Datasheet PDF文件第3页浏览型号CD74HC390M96E4的Datasheet PDF文件第4页浏览型号CD74HC390M96E4的Datasheet PDF文件第5页浏览型号CD74HC390M96E4的Datasheet PDF文件第6页浏览型号CD74HC390M96E4的Datasheet PDF文件第7页 
CD74HC390,  
CD54HCT390, CD74HCT390  
Data sheet acquired from Harris Semiconductor  
SCHS185C  
High-Speed CMOS Logic  
September 1997 - Revised October 2003  
Dual Decade Ripple Counter  
Features  
Description  
• Two BCD Decade or Bi-Quinary Counters  
The CD74HC390 and ’HCT390 dual 4-bit decade ripple  
counters are high-speed silicon-gate CMOS devices and are  
pin compatible with low-power Schottky TTL (LSTTL). These  
devices are divided into four separately clocked sections.  
The counters have two divide-by-2 sections and two divide-  
by-5 sections. These sections are normally used in a BCD  
decade or bi-quinary configuration, since they share a com-  
mon master reset (nMR). If the two master reset inputs (1MR  
and 2MR) are used to simultaneously clear all 8 bits of the  
counter, a number of counting configurations are possible  
within one package. The separate clock inputs (nCP0 and  
nCP1) of each section allow ripple counter or frequency divi-  
sion applications of divide-by-2, 4. 5, 10, 20, 25, 50 or 100.  
Each section is triggered by the High-to-Low transition of the  
input pulses (nCP0 and nCP1).  
• One Package Can Be Configured to Divide-by-2, 4,  
5,10, 20, 25, 50 or 100  
[ /Title  
(CD74  
HC390  
,
CD74  
HCT39  
0)  
/Sub-  
ject  
(High  
Speed  
CMOS  
• Two Master Reset Inputs to Clear Each Decade  
Counter Individually  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
For BCD decade operation, the nQ0 output is connected to  
the nCP1 input of the divide-by-5 section. For bi-quinary  
decade operation, the nO3 output is connected to the nCP0  
• HC Types  
- 2V to 6V Operation  
input and nQ becomes the decade output.  
0
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
The master reset inputs (1MR and 2MR) are active-High  
asynchronous inputs to each decade counter which oper-  
ates on the portion of the counter identified by the “1” and “2”  
prefixes in the pin configuration. A High level on the nMR  
input overrides the clock and sets the four outputs Low.  
CC  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
Ordering Information  
l
OL OH  
TEMP. RANGE  
o
PART NUMBER  
CD54HCT390F3A  
CD74HC390E  
( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
Pinout  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
CD54HCT390  
(CERDIP)  
CD74HC390, CD74HCT390  
(PDIP, SOIC)  
CD74HC390M  
TOP VIEW  
CD74HC390MT  
CD74HC390M96  
CD74HCT390E  
CD74HCT390M  
CD74HCT390MT  
CD74HCT390M96  
1CP0  
1MR  
1
2
3
4
5
6
7
8
16 V  
CC  
15 2CP0  
14 2MR  
13 2Q0  
1Q  
0
1CP1  
1Q  
1Q  
1Q  
12 2CP1  
1
2
3
11 2Q  
10 2Q  
1
2
3
9
2Q  
GND  
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel. The suffix T denotes a small-quantity reel  
of 250.  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1
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中文翻译

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CD74HC390M96E4 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC390M TI

完全替代

 High Speed CMOS Logic Dual Decade Ripple Counter
CD74HC390M96 TI

类似代替

 High-Speed CMOS Logic Dual Decade Ripple Counter

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