Datasheet > CD74HC373

CD74HC373

更新时间： 2024-11-02 05:09:07

品牌	Logo	应用领域
哈里斯 - HARRIS		锁存器
页数	文件大小	规格书
8页	51K
描述
High Speed CMOS Logic Octal Transparent Latch, Three-State Output

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中文翻译

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数据手册

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CD74HC373 数据手册

CD74HC373, CD74HCT373,

CD54HC573, CD74HC573,

S E M I C O N D U C T O R

CD74HCT573

High Speed CMOS Logic

November 1997

Octal Transparent Latch, Three-State Output

Features

Description

• Common Latch Enable Control

• Common Three-State Output Enable Control

• Buffered Inputs

The Harris CD74HC373, CD74HCT373, CD54HC573,

CD74HC573, and CD74HCT573 are high speed Octal Trans-

parent Latches manufactured with silicon gate CMOS technol-

ogy. They possess the low power consumption of standard

CMOS integrated circuits, as well as the ability to drive 15

LSTTL devices. The CD74HCT373 and CD74HCT573 are

functionally as well as pin compatible with the standard

74LS373 and 74LS573.

• Three-State Outputs

• Bus Line Driving Capacity

• Typical Propagation Delay = 12ns at V

= 5V,

C = 15pF, T = 25 C (Data to Output for HC373)

The outputs are transparent to the inputs when the latch

enable (LE) is high. When the latch enable (LE) goes low the

data is latched. The output enable (OE) controls the three-

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

state outputs. When the output enable (OE) is high the

outputs are in the high impedance state. The latch operation

is independent to the state of the output enable. The 373 and

573 are identical in function and differ only in their pinout

arrangements.

• Wide Operating Temperature Range . . . -55 C to 125 C

• Balanced Propagation Delay and Transition Times

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

Ordering Information

TEMP. RANGE

PKG.

NO.

• HC Types

- 2V to 6V Operation

PART NUMBER

CD54HC573F

CD74HC373E

CD74HCT373E

CD74HC573E

CD74HCT573E

CD74HC373M

CD74HCT373M

CD74HC573M

CD74HCT573M

NOTES:

( C)

PACKAGE

-55 to 125

20 Ld CERDIP F20.3

- High Noise Immunity: N = 30%, N = 30% of V

IL IH CC

at V

= 5V

20 Ld PDIP

20 Ld SOIC

F20.3

E20.3

M20.3

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

V = 0.8V (Max), V = 2V (Min)

IL IH

- CMOS Input Compatibility, I ≤ 1µA at V , V

OL OH

1. When ordering, use the entire part number. Add the sufﬁx 96 to

obtain the variant in the tape and reel.

2. Wafer or die for this part number are available which meets all

electrical specifications. Please contact your local sales office or

Harris customer service for ordering information.

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

File Number 1679.1

12 3 4 5 6 7 8

中文翻译

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与CD74HC373相关器件

型号	品牌	获取价格	描述	数据表
CD74HC373E	TI	获取价格	High Speed CMOS Logic Octal Transparent Latch, Three-State Output
CD74HC373E	NXP	获取价格	OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
CD74HC373E	HARRIS	获取价格	High Speed CMOS Logic Octal Transparent Latch, Three-State Output
CD74HC373EE4	TI	获取价格	具有三态输出的高速 CMOS 逻辑八路透明锁存器 \| N \| 20 \| -55 to 12
CD74HC373EN	ETC	获取价格	Logic IC
CD74HC373EX	ROCHESTER	获取价格	HC/UH SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20, PACKAGE-20
CD74HC373EX	RENESAS	获取价格	HC/UH SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20
CD74HC373F	ETC	获取价格	Logic IC
CD74HC373H	ETC	获取价格	8-Bit D-Type Latch
CD74HC373M	NXP	获取价格	OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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