Datasheet > CD74HC22106E

CD74HC22106E

更新时间： 2024-11-15 23:00:39

品牌	Logo	应用领域
英特矽尔 - INTERSIL		开关
页数	文件大小	规格书
9页	71K
描述
QMOS 8 x 8 x 1 Crosspoint Switches with Memory Control

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CD74HC22106E 数据手册

CD74HC22106

Data Sheet

January 1999

File Number 1719.5

QMOS 8 x 8 x 1 Crosspoint Switches with

Memory Control

Features

• 64 Analog Switches in an 8 x 8 x 1 Array

• On-Chip Line Decoder and Control Latches

The CD74HC22106 is a digitally controlled analog switch

which utilize silicon-gate CMOS technology. The

CD74HC22106 features CMOS input-voltage-level

compatibility.

• Automatic Power-Up Reset by Using a 0.1µF Capacitor at

the MR Pin

• R

Resistanced 95Ω at V = 4.5V

The Master Reset has an internal pull-up resistor and is

normally used with a 0.1µF capacitor. During power up all

switches are automatically reset. The crosspoint switches

will reset with MR = 0 even if CE is high. A 6-bit address

through a 6 line to 64 line decoder selects the transmission

gate which can be turned on by applying a logic ONE to the

DATA input and logic ZERO to the STROBE. Similarly, any

transmission gate can be turned OFF by applying a logic

ZERO to the DATA input while strobing the STROBE with a

logic ZERO.

• Analog Signal Capability: V /2

• Wide Operating Temp. Range: -40 C to 85 C

• 2V to 10V Operation

• High Noise Immunity: N = 30%, N = 30% of V ; at

= 5V and 10V

Pinout

CD74HC22106

(PDIP)

TOP VIEW

The CE pin allows the crosspoint array to be cascaded for

matrix expansion in both the X and Y directions.

STROBE

27 A3

Ordering Information

TEMP.

PART NUMBER

RANGE ( C)

PACKAGE

PKG. NO.

25 A1

24 A0

23 X1

22 X3

21 X5

DATA

CD74HC22106E

-40 to 85

28 Ld PDIP

E28.6

MR 10

Y7 11

Y6 12

Y5 13

Y4 14

18 Y0

17 Y1

16 Y2

15 Y3

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

12 3 4 5 6 7...9

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