Datasheet > CD74HC221NSR96

CD74HC221NSR96

更新时间： 2024-11-20 23:41:19

品牌	Logo	应用领域
其他 - ETC		触发器逻辑集成电路光电二极管
页数	文件大小	规格书
11页	65K
描述
MONOSTABLE MULTIVIBRATOR\|HC-CMOS\|SOP\|16PIN\|PLASTIC

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CD74HC221NSR96 数据手册

CD54/74HC221,

CD74HCT221

Data sheet acquired from Harris Semiconductor

SCHS166C

High Speed CMOS Logic

Dual Monostable Multivibrator with Reset

November 1997 - Revised March 2002

Features

Description

• Overriding RESET Terminates Output Pulse

• Triggering from the Leading or Trailing Edge

• Q and Q Buffered Outputs

The ’HC221 and CD74HCT221 are dual monostable

multivibrators with reset. An external resistor (R ) and an

[ /Title

(CD74

HC221

CD74

HCT22

external capacitor (C ) control the timing and the accuracy

for the circuit. Adjustment of R and C provides a wide

range of output pulse widths from the Q and Q terminals.

Pulse triggering on the B input occurs at a particular voltage

level and is not related to the rise and fall time of the trigger

pulse.

• Separate Resets

• Wide Range of Output-Pulse Widths

• Schmitt Trigger on B Inputs

• Fanout (Over Temperature Range)

Once triggered, the outputs are independent of further trigger

inputs on A and B. The output pulse can be terminated by a

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads LOW level on the Reset (R) pin. Trailing Edge triggering (A)

/Sub-

ject

and leading-edge-triggering (B) inputs are provided for

triggering from either edge of the input pulse. On power up,

the IC is reset. If either Mono is not used each input (on the

unused device) must be terminated either high or low.

• Wide Operating Temperature Range . . . -55 C to 125 C

• Balanced Propagation Delay and Transition Times

(High

Speed

CMOS

Logic

Dual

Monos

table

Multi-

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

The minimum value of external resistance, R , is typically 500Ω.

• HC Types

The minimum value of external capacitance, C , is 0pF. The

calculation for the pulse width is t = 0.7 R C at V = 4.5V.

- 2V to 6V Operation

X X

- High Noise Immunity: N = 30%, N = 30% of V

Ordering Information

at V

= 5V

PART NUMBER

CD54HC221F

CD54HC221F3A

CD74HC221E

CD74HC221M

CD74HC221NSR

CD74HCT221E

CD74HCT221M

NOTES:

TEMP. RANGE ( C)

-55 to 125

PACKAGE

16 Ld CERDIP

16 Ld PDIP

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

-55 to 125

V = 0.8V (Max), V = 2V (Min)

IL IH

-55 to 125

- CMOS Input Compatibility, I ≤ 1µA at V , V

OL OH

-55 to 125

16 Ld SOIC

16 Ld SOP

-55 to 125

16 Ld PDIP

-55 to 125

16 Ld SOIC

1. When ordering, use the entire part number. Add the sufﬁx 96 to

obtain the variant in the tape and reel.

2. Wafer or die are available which meets all electrical

specifications. Please contact your local TI sales office or

customer service for ordering information.

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

12 3 4 5 6 7...11

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与CD74HC221NSR96相关器件

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CD74HC221PWRE4	TI	获取价格	High-Speed CMOS Logic Dual Monostable Multivibrator with Reset
CD74HC221PWRG4	TI	获取价格	High-Speed CMOS Logic Dual Monostable Multivibrator with Reset
CD74HC221PWT	TI	获取价格	High-Speed CMOS Logic Dual Monostable Multivibrator with Reset
CD74HC221PWTE4	TI	获取价格	High-Speed CMOS Logic Dual Monostable Multivibrator with Reset

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