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CD74HC20EE4 PDF预览

CD74HC20EE4

更新时间: 2024-11-12 15:46:07
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CD74HC20EE4 数据手册

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CD54HC20, CD74HC20,  
CD54HCT20, CD74HCT20  
Data sheet acquired from Harris Semiconductor  
SCHS130C  
High-Speed CMOS Logic  
Dual 4-Input NAND Gate  
August 1997 - Revised September 2003  
Features  
Description  
• Buffered Inputs  
The ’HC20 and ’HCT20 logic gates utilize silicon gate CMOS  
technology to achieve operating speeds similar to LSTTL  
gates with the low power consumption of standard CMOS  
integrated circuits. All devices have the ability to drive 10  
LSTTL loads. The HCT logic family is functionally pin  
compatible with the standard LS logic family.  
• Typical Propagation Delay: 8ns at V  
o
= 5V,  
[ /Title  
(CD74H  
C20,  
CD74H  
CT20)  
/Subject  
(High  
Speed  
CMOS  
Logic  
Dual 4-  
Input  
CC  
C = 15pF, T = 25 C  
L
A
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
Ordering Information  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
TEMP. RANGE  
o
PART NUMBER  
CD54HC20F3A  
CD54HCT20F3A  
CD74HC20E  
( C)  
PACKAGE  
14 Ld CERDIP  
14 Ld CERDIP  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• HC Types  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
CD74HC20M  
at V  
= 5V  
CC  
CD74HC20MT  
CD74HC20M96  
CD74HCT20E  
CD74HCT20M  
CD74HCT20MT  
CD74HCT20M96  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel. The suffix T denotes a small-quantity reel  
of 250.  
Pinout  
CD54HC20, CD54HCT20  
(CERDIP)  
CD74HC20, CD74HCT20  
(PDIP, SOIC)  
TOP VIEW  
1A  
1B  
1
2
3
4
5
6
7
14 V  
CC  
13 2D  
12 2C  
11 NC  
10 2B  
NC  
1C  
1D  
1Y  
9
8
2A  
2Y  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1

CD74HC20EE4 替代型号

型号 品牌 替代类型 描述 数据表
CD54HC20F3A TI

完全替代

High-Speed CMOS Logic Dual 4-Input NAND Gate
SN74HC20N TI

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DUAL 4-INPUT POSITIVE-NAND GATES
CD74HC20E TI

类似代替

High Speed CMOS Logic Dual 4-Input NAND Gate

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