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CD74HC11ME4 PDF预览

CD74HC11ME4

更新时间： 2024-11-18 20:18:07
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 栅光电二极管逻辑集成电路触发器
页数 文件大小 规格书
15页 609K
描述
AND Gate, HC/UH Series, 3-Func, 3-Input, CMOS, PDSO14, GREEN, PLASTIC, MS-012AB, SOIC-14

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CD74HC11ME4 技术参数

生命周期：Contact Manufacturer包装说明：SOP,
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.67系列：HC/UH
JESD-30 代码：R-PDSO-G14长度：8.65 mm
逻辑集成电路类型：AND GATE功能数量：3
输入次数：3端子数量：14
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
传播延迟（tpd）：150 ns座面最大高度：1.75 mm
最大供电电压 (Vsup)：6 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：4.5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL宽度：3.9 mm
Base Number Matches：1

CD74HC11ME4 数据手册

 浏览型号CD74HC11ME4的Datasheet PDF文件第2页浏览型号CD74HC11ME4的Datasheet PDF文件第3页浏览型号CD74HC11ME4的Datasheet PDF文件第4页浏览型号CD74HC11ME4的Datasheet PDF文件第5页浏览型号CD74HC11ME4的Datasheet PDF文件第6页浏览型号CD74HC11ME4的Datasheet PDF文件第7页 
CD54HC11, CD74HC11,  
CD54HCT11, CD74HCT11  
Data sheet acquired from Harris Semiconductor  
SCHS273E  
High-Speed CMOS Logic  
Triple 3-Input AND Gate  
August 1997 - Revised September 2003  
Features  
Description  
• Buffered Inputs  
The ’HC11 and ’HCT11 logic gates utilize silicon gate CMOS  
technology to achieve operating speeds similar to LSTTL  
gates with the low power consumption of standard CMOS  
integrated circuits. All devices have the ability to drive 10  
LSTTL loads. The HCT logic family is functionally pin  
compatible with the standard LS logic family.  
• Typical Propagation Delay: 8ns at V  
o
= 5V,  
[ /Title  
(CD54  
HCT11  
,
CD74  
HC11,  
CD74  
HCT11  
)
CC  
C = 15pF, T = 25 C  
L
A
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
Ordering Information  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
TEMP. RANGE  
o
PART NUMBER  
CD54HC11F3A  
CD54HCT11F3A  
CD74HC11E  
( C)  
PACKAGE  
14 Ld CERDIP  
14 Ld CERDIP  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
14 Ld PDIP  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
/Sub-  
ject  
(High  
• HC Types  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
CD74HC11M  
at V  
= 5V  
CC  
CD74HC11MT  
CD74HC11M96  
CD74HCT11E  
CD74HCT11M  
CD74HCT11MT  
CD74HCT11M96  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
OL OH  
l
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel. The suffix T denotes a small-quantity reel  
of 250.  
Pinout  
CD54HC11, CD54HCT11  
(CERDIP)  
CD74HC11, CD74HCT11  
(PDIP, SOIC)  
TOP VIEW  
1A  
1B  
1
2
3
4
5
6
7
14 V  
CC  
13 1C  
12 1Y  
11 3C  
10 3B  
2A  
2B  
2C  
2Y  
9
8
3A  
3Y  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1
1234567...15

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