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CD74HC123

更新时间： 2024-10-31 23:04:27
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德州仪器 - TI 触发器
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High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Resets

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CD74HC123 数据手册

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CD74HC123, CD74HCT123,  
CD74HC423, CD74HCT423  
Data sheet acquired from Harris Semiconductor  
SCHS142  
High Speed CMOS Logic Dual Retriggerable  
Monostable Multivibrators with Resets  
September 1997  
Features  
Description  
• Overriding Reset Terminates Output Pulse  
• Triggering From the Leading or Trailing Edge  
• Q and Q Buffered Outputs  
The Harris CD74HC123, CD74HCT123, CD74HC423 and  
CD74HCT423 are dual monostable multivibrators with  
resets. They are all retriggerable and differ only in that the  
123 types can be triggered by a negative to positive reset  
pulse; whereas the 423 types do not have this feature. An  
[ /Title  
(CD74  
HC123  
,
CD74  
HCT12  
3,  
CD74  
HC423  
,
CD74  
HCT42  
3)  
• Separate Resets  
external resistor (R ) and an external capacitor (C ) control  
X
X
the timing and the accuracy for the circuit. Adjustment of Rx  
• Wide Range of Output-Pulse Widths  
• Schmitt Trigger on Both A and B Inputs  
and C provides a wide range of output pulse widths from  
X
the Q and Q terminals. Pulse triggering on the A and B  
inputs occur at a particular voltage level and is not related to  
the rise and fall times of the trigger pulses.  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
Once triggered, the output pulse width may be extended by  
retriggering inputs A and B. The output pulse can be  
terminated by a LOW level on the Reset (R) pin. Trailing  
edge triggering (A) and leading edge triggering (B) inputs  
are provided for triggering from either edge of the input  
pulse. If either Mono is not used each input on the unused  
device (A, B, and R) must be terminated high or low.  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
/Sub-  
ject  
(High  
Speed  
• HC Types  
The minimum value of external resistance, Rx is typically 5kΩ.  
- 2V to 6V Operation  
The minimum value external capacitance, C , is 0pF. The  
X
calculation for the pulse width is t = 0.45 R C at V  
= 5V.  
- High Noise Immunity: N = 30%, N = 30%of V  
IL IH  
at  
W
X X CC  
CC  
V
= 5V  
CC  
Ordering Information  
• HCT Types  
- 4.5V to 5.5V Operation  
PKG.  
NO.  
o
PART NUMBER TEMP. RANGE ( C) PACKAGE  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
CD74HC123E  
CD74HCT123E  
CD74HC423E  
CD74HCT423E  
CD74HC123M  
CD74HCT123M  
CD74HC423M  
CD74HCT423M  
NOTES:  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
16 Ld PDIP  
16 Ld PDIP  
16 Ld PDIP  
16 Ld PDIP  
E16.3  
E16.3  
E16.3  
E16.3  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
OL OH  
l
Pinout  
CD74HC123, CD74HCT123, CD74HC423, CD74HCT423  
(PDIP, SOIC)  
TOP VIEW  
16 Ld SOIC M16.15  
16 Ld SOIC M16.15  
16 Ld SOIC M16.15  
16 Ld SOIC M16.15  
1A  
1B  
1R  
1Q  
2Q  
1
2
3
4
5
6
7
8
16 V  
CC  
15 1R C  
X
X
14 1C  
X
13 1Q  
12 2Q  
11 2R  
10 2B  
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
2C  
X
X
2R C  
2. Wafer or die for this part number is available which meets all elec-  
trical specifications. Please contact your local sales office or  
Harris customer service for ordering information.  
X
9
2A  
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
File Number 1708.1  
Copyright © Harris Corporation 1997  
1
12345678

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CD74HC123 替代型号

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CD54HC123 TI

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