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CD74FCT651EN

更新时间： 2024-11-06 12:55:11
品牌 Logo 应用领域
德州仪器 - TI 总线收发器触发器逻辑集成电路光电二极管输入元件信息通信管理
页数 文件大小 规格书
11页 181K
描述
BiCMOS FCT Interface Logic, Octal Bus Transceivers/Registers, Three-State

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CD74FCT651EN 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：DIP
包装说明：DIP, DIP24,.3针数：24
Reach Compliance Code：not_compliant风险等级：5.68
其他特性：WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION控制类型：INDEPENDENT CONTROL
计数方向：BIDIRECTIONAL系列：FCT
JESD-30 代码：R-PDIP-T24长度：31.64 mm
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER最大I（ol）：0.064 A
位数：8功能数量：1
端口数量：2端子数量：24
最高工作温度：70 °C最低工作温度：
输出特性：3-STATE输出极性：INVERTED
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP24,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 VProp。Delay @ Nom-Sup：9 ns
传播延迟（tpd）：9 ns认证状态：Not Qualified
座面最大高度：5.08 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：5.25 V最小供电电压 (Vsup)：4.75 V
标称供电电压 (Vsup)：5 V表面贴装：NO
技术：BICMOS温度等级：COMMERCIAL
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A触发器类型：POSITIVE EDGE
宽度：7.62 mmBase Number Matches：1

CD74FCT651EN 数据手册

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CD74FCT651,  
CD74FCT652  
Data sheet acquired from Harris Semiconductor  
SCHS262  
BiCMOS FCT Interface Logic, Octal Bus  
Transceivers/Registers, Three-State  
January 1997  
Features  
Description  
The CD74FCT651 and CD74FCT652 three-state, octal bus  
transceivers/registers use a small geometry BiCMOS technol-  
ogy. The output stage is a combination of bipolar and CMOS  
transistors that limits the output HIGH level to two diode drops  
• Buffered Inputs  
• Typical Propagation Delay: 6.8ns at V  
o
= 5V,  
CC  
T = 25 C, C = 50pF  
A
L
• CD75FCT651  
- Inverting  
below V . This resultant lowering of output swing (0V to  
CC  
3.7V) reduces power bus ringing (a source of EMI) and mini-  
mizes V  
bounce and ground bounce and their effects dur-  
CC  
• CD74FCT652  
- Noninverting  
ing simultaneous output switching. The output configuration  
also enhances switching speed and is capable of sinking 64  
milliamperes.  
• Family Features  
These devices consist of bus transceiver circuits, D-Type flip-  
flops, and control circuitry arranged for multiplexed transmis-  
sion of data directly from the data bus or from the internal stor-  
age registers. Output Enables OEAB and OEBA are provided  
to control the transceiver functions. SAB and SBA control pins  
are provided to select whether real-time or stored data is  
transferred. The circuitry used for select control will eliminate  
the typical decoding glitch that occurs in a multiplexer during  
the transition between stored and real-time data. A LOW input  
level selects real-time data and a HIGH selects stored data.  
The following examples demonstrate the four fundamental  
bus management functions that can be performed with the  
octal bus transceivers and registers.  
- SCR Latchup Resistant BiCMOS Process and  
Circuit Design  
- Speed of Bipolar FAST™/AS/S  
- 64mA Output Sink Current  
- Output Voltage Swing Limited to 3.7V at V  
- Controlled Output Edge Rates  
= 5V  
CC  
- Input/Output Isolation to V  
CC  
- BiCMOS Technology with Low Quiescent Power  
Ordering Information  
TEMP.  
RANGE ( C)  
0 to 70  
PKG.  
NO.  
E24.3  
o
Data on the A or B data bus, or both, can be stored in the inter-  
nal D flip-flops by low to high transitions at the appropriate clock  
pins (CAB or CBA) regardless of the select or enable control  
pins. When SAB and SBA are in the real-time transfer mode, it  
is also possible to store data without using the internal D-Type  
flip-flops by simultaneously enabling OEAB and OEBA. In this  
configuration, each output reinforces its input. Thus, when all  
other data sources to the two sets of bus lines are at high  
impedance, each set of bus lines will remain at its last state.  
PART NUMBER  
CD74FCT651EN  
CD74FCT652EN  
CD74FCT651M  
CD74FCT652M  
PACKAGE  
24 Ld PDIP  
24 Ld PDIP  
24 Ld SOIC  
24 Ld SOIC  
0 to 70  
E24.3  
M24.3  
M24.3  
0 to 70  
0 to 70  
NOTE: When ordering the suffix M packages, use the entire part  
number. Add the suffix 96 to obtain the variant in the tape and reel.  
Pinouts  
CD74FCT651 (PDIP, SOIC)  
TOP VIEW  
CD74FCT652 (PDIP, SOIC)  
TOP VIEW  
CAB  
SAB  
OEAB  
A0  
1
2
3
4
5
6
7
8
9
24  
CAB  
SAB  
OEAB  
A0  
1
2
3
4
5
6
7
8
9
24  
VCC  
VCC  
23 CBA  
22 SBA  
21 OEBA  
20 B0  
19 B1  
18 B2  
17 B3  
16 B4  
15 B5  
14 B6  
13 B7  
23 CBA  
22 SBA  
21 OEBA  
20 B0  
19 B1  
18 B2  
17 B3  
16 B4  
15 B5  
14 B6  
13 B7  
A1  
A1  
A2  
A2  
A3  
A3  
A4  
A4  
A5  
A5  
A6 10  
A7 11  
A6 10  
A7 11  
GND 12  
GND 12  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
FAST™ is a trademark of Fairchild Semiconductor.  
Copyright © Harris Corporation 1997  
File Number 2394.2  
8-1  
1234567...11

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