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CD74FCT654

更新时间： 2024-09-15 22:54:23
品牌 Logo 应用领域
德州仪器 - TI 总线收发器
页数 文件大小 规格书
9页 51K
描述
FCT Interface Logic, Octal Bus Transceivers/ Registers, Open Drain (A Side), Three-State (B Side)

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CD74FCT654 数据手册

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CD74FCT653,  
CD74FCT654  
Data sheet acquired from Harris Semiconductor  
SCHS263  
FCT Interface Logic, Octal Bus Transceivers/  
January 1997  
Registers, Open Drain (A Side), Three-State (B Side)  
Features  
Description  
The CD74FCT653 and CD74FCT654 octal bus transceiv-  
ers/registers use a small geometry BiCMOS technology. The  
output stage is a combination of bipolar and CMOS transistors  
• Buffered Inputs  
• Typical Propagation Delay:  
o
6.8ns at V  
= 5V, T = 25 C, C = 50pF  
A L  
CC  
that limits the output HIGH level to two diode drops below V  
This resultant lowering of output swing (0V to 3.7V) reduces  
.
CC  
• CD74FCT653  
- Inverting  
power bus ringing (a source of EMI) and minimizes V  
CC  
bounce and ground bounce and their effects during simulta-  
neous output switching. The output configuration also  
enhances switching speed and is capable of sinking 64mA.  
• CD74FCT654  
- Non-Inverting  
The CD74FCT653 is an inverting type having open drains on  
the A output and three state outputs on the B side. The  
CD74FCT654 differs only in that it is a noninverting type. These  
devices consist of bus transceiver circuits, D-Type flip-flops, and  
control circuitry arranged for multiplexed transmission of data  
directly from the data bus or from the internal storage registers.  
Output Enables OEAB and OEBA are provided to control the  
transceiver functions. SAB and SBA control pins are provided  
to select whether real-time or stored data is transferred. The cir-  
cuitry used for select control will eliminate the typical decoding  
glitch that occurs in a multiplexer during the transition between  
stored and real-time data. A LOW input level selects real-time  
data and a HIGH selects stored data. The following examples  
demonstrate the four fundamental bus management functions  
that can be performed with the octal bus transceivers and regis-  
ters.  
• SCR Latchup Resistant BiCMOS Process and  
Circuit Design  
• Speed of Bipolar FAST™/AS/S  
• 64mA Output Sink Current  
• Output Voltage Swing Limited to 3.7V at V  
• Controlled Output Edge Rates  
= 5V  
CC  
• Input/Output Isolation to V  
CC  
• BiCMOS Technology with Low Quiescent Power  
Ordering Information  
TEMP.  
PKG.  
NO.  
o
PART NUMBER  
CD74FCT653EN  
CD74FCT654EN  
CD74FCT653M  
CD74FCT654M  
RANGE ( C)  
PACKAGE  
24 Ld PDIP  
24 Ld PDIP  
24 Ld SOIC  
24 Ld SOIC  
0 to 70  
E24.3  
Data on the A or B data bus, or both, can be stored in the inter-  
nal D flip-flops by low to high transitions at the appropriate clock  
pins (CAB or CBA) regardless of the select or enable control  
pins. When SAB and SBA are in the real-time transfer mode, it  
is also possible to store data without using the internal D-Type  
flip-flops by simultaneously enabling OEAB and OEBA. In this  
configuration, each output reinforces its input. Thus, when all  
other data sources to the two sets of bus lines are at high  
impedance, each set of bus lines will remain at its last state.  
0 to 70  
E24.3  
M24.3  
M24.3  
0 to 70  
0 to 70  
NOTE: When ordering the suffix M packages, use the entire part  
number. Add the suffix 96 to obtain the variant in the tape and reel.  
Pinouts  
CD74FCT653  
(PDIP, SOIC)  
TOP VIEW  
CD74FCT654  
(PDIP, SOIC)  
TOP VIEW  
CAB  
SAB  
OEAB  
A0  
1
2
3
4
5
6
7
8
9
24  
CAB  
SAB  
OEAB  
A0  
1
2
3
4
5
6
7
8
9
24  
VCC  
VCC  
23 CBA  
22 SBA  
21 OEBA  
20 B0  
19 B1  
18 B2  
17 B3  
16 B4  
15 B5  
14 B6  
13 B7  
23 CBA  
22 SBA  
21 OEBA  
20 B0  
19 B1  
18 B2  
17 B3  
16 B4  
15 B5  
14 B6  
13 B7  
A1  
A1  
A2  
A2  
A3  
A3  
A4  
A4  
A5  
A5  
A6 10  
A7 11  
A6 10  
A7 11  
GND 12  
GND 12  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
FAST™ is a trademark of Fairchild Semiconductor.  
Copyright © Harris Corporation 1997  
File Number 2403.2  
8-1  
1234567...9

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与CD74FCT654相关器件

型号 品牌 获取价格 描述 数据表
CD74FCT654ATEN RENESAS

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 		IC,BUS TRANSCEIVER,SINGLE,8-BIT,FCT/PCT-CMOS,DIP,24PIN,PLASTIC
CD74FCT654ATM RENESAS

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 		IC,BUS TRANSCEIVER,SINGLE,8-BIT,FCT/PCT-CMOS,SOP,24PIN,PLASTIC
CD74FCT654ATM96 RENESAS

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 		Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, BICMOS, PDSO24
CD74FCT654E RENESAS

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 		FCT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDIP24
CD74FCT654EN TI

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 		FCT Interface Logic, Octal Bus Transceivers/ Registers, Open Drain (A Side), Three-State (
CD74FCT654F ETC

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 		Logic IC
CD74FCT654M TI

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 		FCT Interface Logic, Octal Bus Transceivers/ Registers, Open Drain (A Side), Three-State (
CD74FCT654M96 TI

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 		FCT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
CD74FCT7623ATM RENESAS

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 		Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, BICMOS, PDSO20
CD74FCT7623ATM96 RENESAS

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 		FCT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20

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