CD54/74HC534, CD54/74HCT534,
CD54/74HC564, CD54/74HCT564
Data sheet acquired from Harris Semiconductor
SCHS188C
High-Speed CMOS Logic Octal D-Type Flip-Flop,
Three-State Inverting Positive-Edge Triggered
January 1998 - Revised April 2004
Features
Description
• Buffered Inputs
The ’HC534, ’HCT534, ’HC564, and ’HCT564 are high speed
Octal D-Type Flip-Flops manufactured with silicon gate CMOS
• Common Three-State Output-Enable Control
• Three-State Outputs
[ /Title
(CD74
HC534
,
technology. They possess the low power consumption of stan-
dard CMOS integrated circuits, as well as the ability to drive
15 LSTTL loads. Due to the large output drive capability and
the three-state feature, these devices are ideally suited for
interfacing with bus lines in a bus organized system. The two
types are functionally identical and differ only in their pinout
arrangements.
• Bus Line Driving Capability
• Typical Propagation Delay = 13ns at V
CC
= 5V,
CD74
HCT53
4,
CD74
HC564
,
o
C = 15pF, T = 25 C (Clock to Output)
L
A
• Fanout (Over Temperature Range)
The ’HC534, ’HCT534, ’HC564, and ’HCT564 are positive
edge triggered flip-flops. Data at the D inputs, meeting the
setup and hold time requirements, are inverted and trans-
ferred to the Q outputs on the positive going transition of the
CLOCK input. When a high logic level is applied to the OUT-
PUT ENABLE input, all outputs go to a high impedance state,
regardless of what signals are present at the other inputs and
the state of the storage elements.
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
• Balanced Propagation Delay and Transition Times
CD74
HCT56
• Significant Power Reduction Compared to LSTTL
Logic ICs
The HCT logic family is speed, function, and pin compatible
with the standard LS logic family.
• HC Types
- 2V to 6V Operation
Ordering Information
- High Noise Immunity: N = 30%, N = 30% of V
IL IH CC
at V
= 5V
TEMP. RANGE
o
CC
PART NUMBER
CD54HC534F3A
CD54HC564F3A
CD54HCT534F3A
CD54HCT564F3A
CD74HC534E
( C)
PACKAGE
20 Ld CERDIP
20 Ld CERDIP
20 Ld CERDIP
20 Ld CERDIP
20 Ld PDIP
• HCT Types
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V = 0.8V (Max), V = 2V (Min)
IL IH
- CMOS Input Compatibility, I ≤ 1µA at V , V
OL OH
l
CD74HC564E
20 Ld PDIP
CD74HC564M
20 Ld SOIC
20 Ld SOIC
20 Ld PDIP
CD74HC564M96
CD74HCT534E
CD74HCT564E
CD74HCT564M
20 Ld PDIP
20 Ld SOIC
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2004, Texas Instruments Incorporated
1