CD54/74HC533, CD54/74HCT533,
CD54/74HC563, CD74HCT563
Data sheet acquired from Harris Semiconductor
SCHS187C
High-Speed CMOS Logic Octal Inverting
Transparent Latch, Three-State Outputs
January 1998 - Revised July 2003
Features
Description
• Common Latch-Enable Control
• Common Three-State Output Enable Control
• Buffered Inputs
The ’HC533, ’HCT533, ’HC563, and CD74HCT563 are
high-speed Octal Transparent Latches manufactured with
silicon gate CMOS technology. They possess the low power
consumption of standard CMOS integrated circuits, as well as
the ability to drive 15 LSTTL devices.
[ /Title
(CD74H
C533,
• Three-State Outputs
CD74H
CT533,
CD74H
C563,
CD74H
CT563)
/Subject
(High
The outputs are transparent to the inputs when the latch
enable (LE) is high. When the latch enable (LE) goes low the
data is latched. The output enable (OE) controls the
three-state outputs. When the output enable (OE) is high the
outputs are in the high impedance state. The latch operation
is independent of the state of the output enable.
• Bus Line Driving Capacity
• Typical Propagation Delay = 13ns at V
CC
= 5V,
o
C = 15pF, T = 25 C (Data to Output)
L
A
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
The ’HC533 and ’HCT533 are identical in function to the
’HC563 and CD74HCT563 but have different pinouts. The
’HC533 and ’HCT533 are similar to the ’HC373 and ’HCT373;
the latter are non-inverting types.
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
• Balanced Propagation Delay and Transition Times
Speed
Ordering Information
• Significant Power Reduction Compared to LSTTL
Logic ICs
TEMP. RANGE
o
• HC Types
- 2V to 6V Operation
PART NUMBER
CD54HC533F3A
CD54HC563F3A
CD54HCT533F3A
CD74HC533E
( C)
PACKAGE
20 Ld CERDIP
20 Ld CERDIP
20 Ld CERDIP
20 Ld PDIP
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
- High Noise Immunity: N = 30%, N = 30% of V
IL IH CC
at V
= 5V
CC
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
CD74HC563E
20 Ld PDIP
V = 0.8V (Max), V = 2V (Min)
IL IH
- CMOS Input Compatibility, I ≤ 1µA at V , V
OL OH
CD74HC563M
20 Ld SOIC
20 Ld PDIP
l
CD74HCT533E
CD74HCT563E
CD74HCT563M
20 Ld PDIP
20 Ld SOIC
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
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