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CD54HC4020F PDF预览

CD54HC4020F

更新时间: 2024-11-19 05:09:03
品牌 Logo 应用领域
德州仪器 - TI 计数器
页数 文件大小 规格书
13页 269K
描述
High-Speed CMOS Logic 14-Stage Binary Counter

CD54HC4020F 技术参数

生命周期:Active零件包装代码:DIP
包装说明:DIP-16针数:16
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:5.19Is Samacsys:N
其他特性:OUTPUT FROM 12 STAGES AVAILABLE计数方向:UP
系列:HC/UHJESD-30 代码:R-GDIP-T16
长度:19.56 mm负载电容(CL):50 pF
负载/预设输入:NO逻辑集成电路类型:BINARY COUNTER
最大频率@ Nom-Sup:20000000 Hz最大I(ol):0.0052 A
工作模式:ASYNCHRONOUS位数:14
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE包装方法:TUBE
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
最大电源电流(ICC):0.08 mAProp。Delay @ Nom-Sup:30 ns
传播延迟(tpd):210 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Counters
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:NEGATIVE EDGE宽度:6.92 mm
最小 fmax:24 MHzBase Number Matches:1

CD54HC4020F 数据手册

 浏览型号CD54HC4020F的Datasheet PDF文件第2页浏览型号CD54HC4020F的Datasheet PDF文件第3页浏览型号CD54HC4020F的Datasheet PDF文件第4页浏览型号CD54HC4020F的Datasheet PDF文件第5页浏览型号CD54HC4020F的Datasheet PDF文件第6页浏览型号CD54HC4020F的Datasheet PDF文件第7页 
CD54HC4020, CD74HC4020,  
CD54HCT4020, CD74HCT4020  
Data sheet acquired from Harris Semiconductor  
SCHS201C  
High-Speed CMOS Logic  
14-Stage Binary Counter  
February 1998 - Revised October 2003  
Features  
Description  
• Fully Static Operation  
• Buffered Inputs  
The ’HC4020 and ’HCT4020 are 14-stage ripple-carry  
binary counters. All counter stages are master-slave flip-  
flops. The state of the stage advances one count on the  
negative clock transition of each input pulse; a high voltage  
level on the MR line resets all counters to their zero state. All  
inputs and outputs are buffered.  
[ /Title  
(CD74  
HC402  
0,  
CD74  
HCT40  
20)  
/Sub-  
ject  
(High  
Speed  
CMOS  
• Common Reset  
• Negative Edge Clocking  
• Fanout (Over Temperature Range)  
Ordering Information  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
TEMP. RANGE  
o
PART NUMBER  
CD54HC4020F3A  
CD54HCT4020F3A  
CD74HC4020E  
( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld CERDIP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
• HC Types  
CD74HC4020M  
- 2V to 6V Operation  
CD74HC4020MT  
CD74HC4020M96  
CD74HCT4020E  
CD74HCT4020M  
CD74HCT4020MT  
CD74HCT4020M96  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
CC  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
OL OH  
l
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel. The suffix T denotes a small-quantity reel  
of 250.  
Pinout  
CD54HC4020, CD54HCT4020  
(CERDIP)  
CD74HC4020, CD74HCT4020  
(PDIP, SOIC)  
TOP VIEW  
Q
Q
Q
1
2
3
4
5
6
7
8
16 V  
CC  
12  
13  
14  
15 Q  
14 Q  
13 Q  
12 Q  
11  
10  
8
Q6  
Q
Q
Q
5
7
4
9
11 MR  
10 CP  
9
Q ‘  
1
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1

CD54HC4020F 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC4020M TI

完全替代

High-Speed CMOS Logic 14-Stage Binary Counter
CD74HC4020E TI

完全替代

High Speed CMOS Logic 14-Stage Binary Counter
CD74HC4020M96 TI

完全替代

High-Speed CMOS Logic 14-Stage Binary Counter

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