CD54HC273, CD74HC273,
CD54HCT273, CD74HCT273
Data sheet acquired from Harris Semiconductor
SCHS174B
High-Speed CMOS Logic
Octal D-Type Flip-Flop with Reset
February 1998 - Revised May 2003
Features
Description
• Common Clock and Asynchronous Master Reset
• Positive Edge Triggering
• Buffered Inputs
The ’HC273 and ’HCT273 high speed octal D-Type flip-flops
with a direct clear input are manufactured with silicon-gate
CMOS technology. They possess the low power consumption
of standard CMOS integrated circuits.
[ /Title
(CD74
HC273
,
CD74
HCT27
3)
Information at the D inputis transferred to the Q outputs on
the positive-going edge of the clock pulse. All eight flip-flops
are controlled by a common clock (CP) and a common reset
(MR). Resetting is accomplished by a low voltage level
independent of the clock. All eight Q outputs are reset to a
logic 0.
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
• Balanced Propagation Delay and Transition Times
/Sub-
ject
Ordering Information
• Significant Power Reduction Compared to LSTTL
Logic ICs
o
PART NUMBER
CD54HC273F3A
CD74HC273E
TEMP. RANGE ( C)
-55 to 125
PACKAGE
20 Ld CERDIP
20 Ld PDIP
(High
Speed
CMOS
Logic
Octal
D-
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N = 30%, N = 30% of V
CC
-55 to 125
IL
IH
at V
= 5V
CC
CD74HC273M
-55 to 125
20 Ld SOIC
20 Ld SOIC
20 Ld CERDIP
20 Ld PDIP
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
CD74HC273M96
CD54HCT273F3A
CD74HCT273E
CD74HCT273M
CD74HCT273M96
-55 to 125
-55 to 125
Type
Flip-
V = 0.8V (Max), V = 2V (Min)
IL IH
-55 to 125
- CMOS Input Compatibility, I ≤ 1µA at V , V
OL OH
l
-55 to 125
20 Ld SOIC
20 Ld SOIC
-55 to 125
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel.
Pinout
CD54HC273, CD54HCT273
(CERDIP)
CD74HC273, CD74HCT273
(PDIP, SOIC)
TOP VIEW
1
2
3
4
5
6
7
8
9
V
MR
Q0
D0
D1
Q1
Q2
D2
D3
Q3
20
19
CC
Q7
18 D7
17 D6
16 Q6
15
14
Q5
D5
13 D4
12
Q4
11 CP
GND 10
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1