CD54HC132, CD74HC132,
CD54HCT132, CD74HCT132
Data sheet acquired from Harris Semiconductor
SCHS145E
High-Speed CMOS Logic
Quad 2-Input NAND Schmitt Trigger
August 1997 - Revised March 2004
Features
Description
• Unlimited Input Rise and Fall Times
• Exceptionally High Noise Immunity
• Typical Propagation Delay: 10ns at V
The ’HC132 and ’HCT132 each contain four 2-input NAND
Schmitt Triggers in one package. This logic device utilizes
silicon gate CMOS technology to achieve operating speeds
similar to LSTTL gates with the low power consumption of
standard CMOS integrated circuits. All devices have the
ability to drive 10 LSTTL loads. The HCT logic family is
functionally pin compatible with the standard LS logic family.
[ /Title
(CD74
HC132
,
= 5V,
CC
o
C = 15pF, T = 25 C
L
A
• Fanout (Over Temperature Range)
CD74
HCT13
2)
/Sub-
ject
(High
Speed
CMOS
Logic
Quad
2-Input
NAND
Schmit
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Ordering Information
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
• Balanced Propagation Delay and Transition Times
TEMP. RANGE
o
PART NUMBER
CD54HC132F3A
CD54HCT132F3A
CD74HC132E
( C)
PACKAGE
14 Ld CERDIP
14 Ld CERDIP
14 Ld PDIP
14 Ld SOIC
14 Ld SOIC
14 Ld SOIC
14 Ld PDIP
14 Ld SOIC
14 Ld SOIC
14 Ld SOIC
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
CD74HC132M
- High Noise Immunity: N = 37%, N = 51% of V
IL IH CC
at V
= 5V
CC
CD74HC132MT
CD74HC132M96
CD74HCT132E
CD74HCT132M
CD74HCT132MT
CD74HCT132M96
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V = 0.8V (Max), V = 2V (Min)
IL IH
- CMOS Input Compatibility, I ≤ 1µA at V , V
OL OH
l
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
Pinout
CD54HC132, CD54HCT132
(CERDIP)
CD74HC132, CD74HCT132
(PDIP, SOIC)
TOP VIEW
1A
1B
1
2
3
4
5
6
7
14 V
CC
13 4B
12 4A
11 4Y
10 3B
1Y
2A
2B
2Y
9
8
3A
3Y
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2004, Texas Instruments Incorporated
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