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CD54AC32 PDF预览

CD54AC32

更新时间: 2024-09-15 00:00:55
品牌 Logo 应用领域
德州仪器 - TI
页数 文件大小 规格书
6页 39K
描述
Quad 2-Input OR Gate

CD54AC32 数据手册

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CD54/74AC32,  
CD54/74ACT32  
Data sheet acquired from Harris Semiconductor  
SCHS230A  
September 1998 - Revised May 2000  
Quad 2-Input OR Gate  
Features  
Description  
• Buffered Inputs  
The ’AC32 and ’ACT32 are quad 2-input OR gates that utilize  
Advanced CMOS Logic technology.  
• Typical Propagation Delay  
o
- 4.5ns at V  
= 5V, T = 25 C, C = 50pF  
A L  
CC  
Ordering Information  
• Exceeds 2kV ESD Protection MIL-STD-883, Method  
3015  
PART  
TEMP.  
o
NUMBER  
RANGE ( C)  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
PACKAGE  
14 Ld CERDIP  
14 Ld PDIP  
• SCR-Latchup-Resistant CMOS Process and Circuit  
Design  
CD54AC32F3A  
CD74AC32E  
CD74AC32M  
CD54ACT32F3A  
CD74ACT32E  
CD74ACT32M  
NOTES:  
[ /Title  
(CD74  
AC32,  
CD74  
ACT32  
)
• Speed of Bipolar FAST™/AS/S with Significantly  
Reduced Power Consumption  
14 Ld SOIC  
14 Ld CERDIP  
14 Ld PDIP  
• Balanced Propagation Delays  
• AC Types Feature 1.5V to 5.5V Operation and  
Balanced Noise Immunity at 30% of the Supply  
14 Ld SOIC  
/Sub-  
ject  
±24mA Output Drive Current  
- Fanout to 15 FAST™ ICs  
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
- Drives 50Transmission Lines  
(Quad  
2-Input  
OR  
2. Wafer and die for this part number is available which meets all  
electrical specifications. Please contact your local TI sales office or  
customer service for ordering information.  
Gate)  
/Autho  
r ()  
/Key-  
words  
(Har-  
ris  
Semi-  
con-  
ductor,  
Advan  
ced  
Pinout  
Functional Diagram  
CD54AC32, CD54ACT32  
(CERDIP)  
CD74AC32, CD74ACT32  
(PDIP, SOIC)  
14  
13  
12  
11  
10  
9
1
2
3
4
5
6
7
V
1A  
1B  
CC  
4B  
4A  
4Y  
3B  
3A  
3Y  
TOP VIEW  
1Y  
1A  
1B  
1
2
3
4
5
6
7
14 V  
CC  
13 4B  
12 4A  
11 4Y  
10 3B  
2A  
1Y  
2B  
2A  
2Y  
2B  
CMOS  
,Harris  
Semi-  
con-  
8
2Y  
9
8
3A  
3Y  
GND  
GND  
TRUTH TABLE  
INPUTS  
ductor,  
Advan  
ced  
TTL)  
/Cre-  
ator ()  
OUTPUT  
nA  
L
nB  
L
nY  
L
L
H
L
H
H
H
H
H
H
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
FAST™ is a Trademark of Fairchild Semiconductor.  
1
Copyright © 2000, Texas Instruments Incorporated  

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