Datasheet > CD4527BKMSR

CD4527BKMSR

更新时间： 2024-11-05 06:17:11

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
11页	102K
描述
4000/14000/40000 SERIES, SYN NEGATIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, CDFP16

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CD4527BKMSR 数据手册

CD4527BMS

CMOS BCD Rate Multiplier

December 1992

Features

Description

• High Voltage Type (20V Rating)

• Cascadable in Multiples of 4-Bits

• Set to “9” Input and “9” Detect Output

• 100% Tested for Quiescent Current at 20V

• 5V, 10V and 15V Parametric Ratings

CD4527BMS is a low power 4-bit digital rate multiplier that

provides an output pulse rate which is the clock input pulse

rate multiplied by 1/10 times the BCD input. For example,

when the BCD input is 8, there will be 8 output pulses for

every 10 input pulses. This device may be used to perform

arithmetic operations (add, subtract, divide, raise to a

power), solve algebraic and differential equations, generate

natural logarithms and trigonometric functions, A/D and D/A

conversion, and frequency division.

• Maximum Input Current of 1µA at 18V Over Full Pack-

age Temperature Range; 100nA at 18V and +25^oC

For fractional multipliers with more than one digit,

CD4527BMS devices may be cascaded in two different

modes: the Add mode and the Multiply mode (see Figures 9

and 11). In the Add mode,

• Noise Margin (Over Full Package/Temperature Range)

- 1V at VDD = 5V

- 2V at VDD = 10V

- 2.5V at VDD = 15V

Output Rate =

(Clock Rate) [0.1BCD1 + 0.01BCD2 + 0.001BCD3 + . . .]

• Standardized Symmetrical Output Characteristics

• Meets All Requirements of JEDEC Tentative Standard

No. 13B, “Standard Speciﬁcations for Description of

‘B’ Series CMOS Devices”

In the Multiply mode, the fraction programmed into the ﬁrst

rate multiplier is multiplied by the fraction programmed into

the second one,

e.g.

or 36 output

Applications

100

• Numerical Control

• Instrumentation

• Digital Filtering

pulses for every 100 clock input pulses.

The CD4527BMS is supplied in these 16-lead outline packages:

Braze Seal DIP

Frit Seal DIP

H4X

H1F

H6W

• Frequency Synthesis

Ceramic Flatpack

Pinout

Functional Diagram

CD4527BMS

TOP VIEW

BCD RATE

SELECT INPUTS

STROBE

14 15

“9” OUT

16 VDD

CLOCK

CASCADE

15 B

INHIBIT

14 A

(CARRY) IN

OUT

RATE

SELECT

LOGIC

SET TO “9”

13 CLEAR

12 CASCADE

11 INHIBIT IN (CARRY)

10 STROBE

RATE

OUTPUTS

SET TO

NINE

÷10

COUNTER

OUT

CLEAR

OUT

INHIBIT OUT (CARRY)

VSS

“9” OUT

CLOCK

INHIBIT

(CARRY) OUT

VSS = 8

VDD = 16

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

File Number 3343

7-1216

12 3 4 5 6 7...11

中文翻译

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与CD4527BKMSR相关器件

型号	品牌	获取价格	描述	数据表
CD4527BMN	TI	获取价格	4000/14000/40000 SERIES, SYN NEGATIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, PDIP16, PLAS
CD4527BMS	INTERSIL	获取价格	CMOS BCD Rate Multiplier
CD4527BNSR	TI	获取价格	CMOS BCD Rata Multiplier
CD4527BNSRE4	TI	获取价格	CMOS BCD Rata Multiplier
CD4527BNSRG4	TI	获取价格	CMOS BCD Rata Multiplier
CD4527BPW	TI	获取价格	CMOS BCD Rata Multiplier
CD4527BPWE4	TI	获取价格	CMOS BCD Rata Multiplier
CD4527BPWG4	TI	获取价格	CMOS BCD Rata Multiplier
CD4527BPWR	TI	获取价格	CMOS BCD Rata Multiplier
CD4527BPWRE4	TI	获取价格	CMOS BCD Rata Multiplier

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