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CD4070BC_02 PDF预览

CD4070BC_02

更新时间: 2024-01-08 22:04:08
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD
页数 文件大小 规格书
5页 60K
描述
Quad 2-Input EXCLUSIVE-OR Gate

CD4070BC_02 数据手册

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October 1987  
Revised April 2002  
CD4070BC  
Quad 2-Input EXCLUSIVE-OR Gate  
General Description  
Features  
The CD4070BC employs complementary MOS (CMOS)  
transistors to achieve wide power supply operating range,  
low power consumption, and high noise margin, the  
CD4070BC provide basic functions used in the implemen-  
tation of digital integrated circuit systems. The N- and P-  
channel enhancement mode transistors provide a symmet-  
rical circuit with output swing essentially equal to the supply  
voltage. No DC power other than that caused by leakage  
current is consumed during static condition. All inputs are  
protected from damage due to static discharge by diode  
Wide supply voltage range: 3.0V to 15V  
High noise immunity: 0.45 VDD typ.  
Low power TTL compatibility:  
Fan out of 2 driving 74L or 1 driving 74LS  
Pin compatible to CD4030A  
Equivalent to MM74C86 and MC14070B  
clamps to VDD and VSS  
.
Ordering Code:  
Order Number Package Number  
Package Description  
CD4070BCM  
CD4070BCN  
M14A  
N14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Truth Table  
Inputs  
Outputs  
A
L
B
L
Y
L
L
H
L
H
H
L
H
H
H
Top View  
© 2002 Fairchild Semiconductor Corporation  
DS005976  
www.fairchildsemi.com  

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