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CD4050BCN_NL PDF预览

CD4050BCN_NL

更新时间: 2024-11-04 19:49:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
7页 69K
描述
Buffer, 4000/14000/40000 Series, 6-Func, 1-Input, CMOS, PDIP16, 0.300 INCH, PLASTIC, MS-001, DIP-16

CD4050BCN_NL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP16,.3
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.16
其他特性:CMOS-TTL LEVEL TRANSLATOR系列:4000/14000/40000
JESD-30 代码:R-PDIP-T16JESD-609代码:e3
长度:19.305 mm负载电容(CL):50 pF
逻辑集成电路类型:BUFFER功能数量:6
输入次数:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT APPLICABLE
电源:5/15 VProp。Delay @ Nom-Sup:120 ns
传播延迟(tpd):120 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:5.08 mm
子类别:Gates最大供电电压 (Vsup):15 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Matte Tin (Sn)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT APPLICABLE
宽度:7.62 mmBase Number Matches:1

CD4050BCN_NL 数据手册

 浏览型号CD4050BCN_NL的Datasheet PDF文件第2页浏览型号CD4050BCN_NL的Datasheet PDF文件第3页浏览型号CD4050BCN_NL的Datasheet PDF文件第4页浏览型号CD4050BCN_NL的Datasheet PDF文件第5页浏览型号CD4050BCN_NL的Datasheet PDF文件第6页浏览型号CD4050BCN_NL的Datasheet PDF文件第7页 
October 1987  
Revised April 2002  
CD4049UBC CD4050BC  
Hex Inverting Buffer •  
Hex Non-Inverting Buffer  
General Description  
Features  
Wide supply voltage range: 3.0V to 15V  
The CD4049UBC and CD4050BC hex buffers are mono-  
lithic complementary MOS (CMOS) integrated circuits con-  
structed with N- and P-channel enhancement mode  
transistors. These devices feature logic level conversion  
using only one supply voltage (VDD). The input signal high  
Direct drive to 2 TTL loads at 5.0V over full temperature  
range  
High source and sink current capability  
Special input protection permits input voltages greater  
than VDD  
level (VIH) can exceed the VDD supply voltage when these  
devices are used for logic level conversions. These  
devices are intended for use as hex buffers, CMOS to DTL/  
TTL converters, or as CMOS current drivers, and at VDD  
Applications  
=
5.0V, they can drive directly two DTL/TTL loads over the  
full operating temperature range.  
CMOS hex inverter/buffer  
CMOS to DTL/TTL hex converter  
CMOS current “sink” or “source” driver  
CMOS HIGH-to-LOW logic level converter  
Ordering Code:  
Order Number Package Number  
Package Description  
CD4049UBCM  
CD4049UBCN  
CD4050BCM  
CD4050BCN  
M16A  
N16E  
M16A  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter Xto the ordering code.  
Connection Diagrams  
Pin Assignments for DIP  
CD4049UBC  
CD4050BC  
Top View  
Top View  
© 2002 Fairchild Semiconductor Corporation  
DS005971  
www.fairchildsemi.com  

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