Datasheet > CD4034BMS

CD4034BMS

更新时间： 2024-11-20 22:54:19

品牌	Logo	应用领域
英特矽尔 - INTERSIL		/
页数	文件大小	规格书
14页	150K
描述
CMOS 8-Stage Static Bidirectional Parallel/Serial Input/Output Bus Register

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CD4034BMS 数据手册

CD4034BMS

CMOS 8-Stage Static Bidirectional Parallel/Serial

Input/Output Bus Register

December 1992

Features

Description

• High Voltage Types (20V Rating)

• Bidirectional Parallel Data Input

• Parallel or Serial Inputs/Parallel Outputs

CD4034BMS is a static eight-stage parallel-or serial-input

parallel-output register. It can be used to:

1) bidirectionally transfer parallel information between two

buses, 2) convert serial data to parallel form and direct the

• Asynchronous or Synchronous Parallel Data Loading

parallel data to either of two buses, 3) store (recirculate) par-

allel data, or 4) accept parallel data from either of two buses

and convert that data to serial form. Inputs that control the

operations include a single-phase CLOCK (CL), A DATA

ENABLE (AE), ASYNCHRONOUS/SYNCHRONOUS (A/S),

A-BUS-TO-B-BUS/B-BUS-TO-A-BUS (A/B), and PARAL-

LEL/SERIAL (P/S).

• Parallel Data-Input Enable on “A” Data Lines (3-State

Output)

• Data Recirculation for Register Expansion

• Multipackage Register Expansion

• Fully Static Operation DC-to-10MHz (typ.) at

VDD = 10V

Data inputs include 16 bidirectional parallel data lines of

which the eight A data lines are inputs (3-state outputs) and

the B data lines are outputs (inputs) depending on the signal

level on the A/B input. In addition, an input for SERIAL DATA

is also provided.

• Standardized Symmetrical Output Characteristics

• 100% Tested for Quiescent Current at 20V

• 5V, 10V and 15V Parametric Ratings

All register stages are D-type master-slave ﬂip-ﬂops with

separate master and slave clock inputs generated internally

to allow synchronous or asynchronous data transfer from

master to slave. Isolation from external noise and the effects

of loading is provided by output buffering.

• Maximum Input Current of 1µA at 18V Over Full

Package-Temperature Range;

- 100nA at 18V and +25^oC

• Noise Margin (Over Full Package Temperature Range):

- 1V at VDD = 5V

- 2V at VDD = 10V

Pinout

- 2.5V at VDD = 15V

CD4034BMS

TOP VIEW

• Meets All Requirements of JEDEC Tentative Standard

No. 13B, “Standard Speciﬁcations for Description of

‘B’ Series CMOS Devices”

VDD

23 8

Applications

22 7

• Parallel Input/Parallel Output, Serial Input/Parallel Out-

put, Serial Input/Serial Output Register

21 6

20 5

• Shift Right/Shift Left Register

• Shift Right/Shift Left With Parallel Loading

• Address Register

19 4

18 3

17 2

“A” ENABLE

16 1

• Buffer Register

SERIAL INPUT 10

A/B 11

15 CLOCK

14 A/S

13 P/S

• Bus System Register with Enable Parallel Lines at Bus

Side

VSS 12

• Double Bus Register System

• Up-Down Johnson or Ring Counter

• Pseudo-Random Code Generators

• Sample and Hold Register (Storage, Counting,

Display)

• Frequency and Phase Comparator

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

File Number 3307

7-837

12 3 4 5 6 7...14

中文翻译

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与CD4034BMS相关器件

型号	品牌	获取价格	描述	数据表
CD4034BMW	TI	获取价格	IC,SHIFT REGISTER,CMOS,FP,24PIN,CERAMIC
CD4034BMW/883	TI	获取价格	IC,SHIFT REGISTER,CMOS,FP,24PIN,CERAMIC
CD4034BMW/883C	TI	获取价格	IC,SHIFT REGISTER,CMOS,FP,24PIN,CERAMIC
CD4034BNSR	TI	获取价格	4000/14000/40000 SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE
CD4034BNSRE4	TI	获取价格	4000/14000/40000 SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE
CD4034BPW	TI	获取价格	4000/14000/40000 SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE
CD4034BPWG4	TI	获取价格	4000/14000/40000 SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE
CD4034BPWR	TI	获取价格	4000/14000/40000 SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE
CD4034BPWRE4	TI	获取价格	4000/14000/40000 SERIES, 8-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE
CD4035	NSC	获取价格	4-Bit Parallel-In/Parallel-Out Shift Register

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