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CD4033 PDF预览

CD4033

更新时间: 2024-11-19 22:54:19
品牌 Logo 应用领域
英特矽尔 - INTERSIL 计数器
页数 文件大小 规格书
11页 125K
描述
CMOS Decade Counter/Divider

CD4033 数据手册

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CD4033BMS  
CMOS Decade Counter/Divider  
December 1992  
Features  
Description  
• High Voltage Types (20V Rating)  
CD4033BMS consists of a 5 stage Johnson decade counter  
and an output decoder which converts the Johnson code to a 7  
segment decoded output for driving one stage in a numerical  
display.  
• Decoded 7 Segment Display Outputs and Ripple  
Blanking  
• Counter and 7 Segment Decoding in One Package  
This device is particularly advantageous in display applications  
where low power dissipation and/or low package count is  
important.  
• Easily Interfaced with 7 Segment Display Types  
• Fully Static Counter Operation DC to 6MHz (typ.) at VDD =  
10V  
A high RESET signal clears the decade counter to its zero  
count. The counter is advanced one count at the positive clock  
signal transition if the CLOCK INHIBIT signal is low. Counter  
advancement via the clock line is inhibited when the CLOCK  
INHIBIT signal is high. The CLOCK INHIBIT signal can be used  
as a negative-edge clock if the clock line is held high. Antilock  
gating is provided on the JOHNSON counter, thus assuring  
proper counting sequence. The CARRY-OUT (Cout) signal  
completes one cycle every ten CLOCK INPUT cycles and is  
used to clock the succeeding decade directly in a multi-decade  
counting chain.  
• Ideal for Low-Power Displays  
• “Ripple Blanking” and Lamp Test  
• 100% Tested for Quiescent Current at 20V  
• Standardized Symmetrical Output Characteristics  
• 5V, 10V and 15V Parametric Ratings  
• Schmitt-Triggered Clock Inputs  
• Meets All Requirements of JEDEC Tentative Stan-  
dards No. 13B, “Standard Specifications for Descrip- The seven decoded outputs (a, b, c, d, e, f, g) illuminate the  
tion of “B” Series CMOS Device’s  
proper segments in a seven segment display device used for  
representing the decimal numbers 0 to 9. The 7 segment out-  
puts go high on selection.  
Applications  
• Decade Counting 7 Segment Decimal Display  
• Frequency Division 7 Segment Decimal Displays  
• Clocks, Watches, Timers (e.g. ÷ 60, ÷ 60, ÷12 Counter/  
Display  
• Counter/Display Driver For Meter Applications  
Functional Diagram  
Pinout  
VDD  
16  
CD4033BMS  
TOP VIEW  
1
2
10 a  
CLOCK  
CLOCK  
1
2
3
4
5
6
7
8
16 VDD  
15 RESET  
14 LAMP TEST  
13 c  
12  
13  
9
b
c
d
e
f
CLOCK INHIBIT  
CLOCK  
INHIBIT  
RIPPLE BLANKING IN  
RIPPLE BLANKING OUT  
15  
14  
3
11  
6
CARRY OUT  
12 b  
RESET  
f
g
11 e  
7
g
LAMP  
TEST  
10 a  
5
CARRY OUT  
9
d
VSS  
4
RIPPLE  
BLK  
IN  
RIPPLE  
BLK  
OUT  
8
VSS  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 3301  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
7-826  

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