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CAT28LV64JA-25T PDF预览

CAT28LV64JA-25T

更新时间: 2024-11-29 22:16:11
品牌 Logo 应用领域
CATALYST 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
12页 528K
描述
64K-Bit CMOS PARALLEL EEPROM

CAT28LV64JA-25T 数据手册

 浏览型号CAT28LV64JA-25T的Datasheet PDF文件第2页浏览型号CAT28LV64JA-25T的Datasheet PDF文件第3页浏览型号CAT28LV64JA-25T的Datasheet PDF文件第4页浏览型号CAT28LV64JA-25T的Datasheet PDF文件第5页浏览型号CAT28LV64JA-25T的Datasheet PDF文件第6页浏览型号CAT28LV64JA-25T的Datasheet PDF文件第7页 
E
CAT28LV64  
64K-Bit CMOS PARALLEL EEPROM  
TM  
FEATURES  
CMOS and TTL compatible I/O  
3.0V to 3.6 V Supply  
Automatic page write operation:  
– 1 to 32 bytes in 5ms  
Read access times:  
– 150/200/250ns  
– Page load timer  
Low power CMOS dissipation:  
– Active: 8 mA max.  
End of write detection:  
– Toggle bit  
– Standby: 100 µA max.  
DATA polling  
Simple write operation:  
Hardware and software write protection  
100,000 program/erase cycles  
100 year data retention  
– On-chip address and data latches  
– Self-timed write cycle with auto-clear  
Fast write cycle time:  
– 5ms max.  
Commercial, industrial and automotive  
temperature ranges  
DESCRIPTION  
The CAT28LV64 is a low voltage, low power, CMOS  
parallel EEPROM organized as 8K x 8-bits. It requires a  
simple interface for in-system programming. On-chip  
addressanddatalatches,self-timedwritecyclewithauto-  
clear and VCC power up/down write protection eliminate  
additional timing and protection hardware. DATA Polling  
and Toggle status bit signal the start and end of the self-  
timed write cycle. Additionally, the CAT28LV64 features  
hardware and software write protection.  
The CAT28LV64 is manufactured using Catalyst’s  
advanced CMOS floating gate technology. It is designed  
to endure 100,000 program/erase cycles and has a data  
retention of 100 years. The device is available in JEDEC  
approved 28-pin DIP, 28-pin TSOP, 28-pin SOIC or 32-  
pin PLCC packages.  
BLOCK DIAGRAM  
8,192 x 8  
E2PROM  
ARRAY  
ROW  
ADDR. BUFFER  
A –A  
5
12  
DECODER  
& LATCHES  
INADVERTENT  
WRITE  
HIGH VOLTAGE  
GENERATOR  
32 BYTE PAGE  
REGISTER  
V
CC  
PROTECTION  
CE  
OE  
WE  
CONTROL  
LOGIC  
I/O BUFFERS  
DATA POLLING  
AND  
TIMER  
TOGGLE BIT  
I/O –I/O  
0
7
ADDR. BUFFER  
& LATCHES  
A –A  
COLUMN  
0
4
DECODER  
Doc. No. 1010, Rev. D  
© 2004 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
1

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