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CAT28C513 PDF预览

CAT28C513

更新时间: 2024-10-27 22:54:15
品牌 Logo 应用领域
CATALYST 可编程只读存储器
页数 文件大小 规格书
10页 101K
描述
512K-Bit CMOS PARALLEL E2PROM

CAT28C513 数据手册

 浏览型号CAT28C513的Datasheet PDF文件第2页浏览型号CAT28C513的Datasheet PDF文件第3页浏览型号CAT28C513的Datasheet PDF文件第4页浏览型号CAT28C513的Datasheet PDF文件第5页浏览型号CAT28C513的Datasheet PDF文件第6页浏览型号CAT28C513的Datasheet PDF文件第7页 
Advanced  
CAT28C512/513  
512K-Bit CMOS PARALLEL E2PROM  
FEATURES  
Fast Read Access Times: 120/150 ns  
Automatic Page Write Operation:  
–1 to 128 Bytes in 5ms  
Low Power CMOS Dissipation:  
–Active: 50 mA Max.  
–Page Load Timer  
–Standby: 200 µA Max.  
End of Write Detection:  
–Toggle Bit  
Simple Write Operation:  
DATA Polling  
–On-Chip Address and Data Latches  
–Self-Timed Write Cycle with Auto-Clear  
Hardware and Software Write Protection  
100,000 Program/Erase Cycles  
100 Year Data Retention  
Fast Write Cycle Time:  
–5ms Max  
CMOS and TTL Compatible I/O  
Commercial, Industrial and Automotive  
Temperature Ranges  
DESCRIPTION  
The CAT28C512/513 is manufactured using Catalyst’s  
advancedCMOSfloatinggatetechnology.Itisdesigned  
to endure 100,000 program/erase cycles and has a data  
retention of 100 years. The device is available in JEDEC  
approved 32-pin DIP, PLCC, 32-pin TSOP and 40-pin  
TSOP packages.  
TheCAT28C512/513isafast,lowpower,5V-onlyCMOS  
parallel E2PROM organized as 64K x 8-bits. It requires  
a simple interface for in-system programming. On-chip  
address and data latches, self-timed write cycle with  
auto-clear and VCC power up/down write protection  
eliminate additional timing and protection hardware.  
DATA Polling and Toggle status bits signal the start and  
end of the self-timed write cycle. Additionally, the  
CAT28C512/513 features hardware and software write  
protection.  
BLOCK DIAGRAM  
65,536 x 8  
E2PROM  
ARRAY  
ROW  
DECODER  
ADDR. BUFFER  
A –A  
7
15  
& LATCHES  
INADVERTENT  
WRITE  
PROTECTION  
HIGH VOLTAGE  
GENERATOR  
128 BYTE PAGE  
REGISTER  
V
CC  
CE  
OE  
WE  
CONTROL  
TIMER  
I/O BUFFERS  
DATA POLLING  
AND  
TOGGLE BIT  
I/O –I/O  
0
7
ADDR. BUFFER  
& LATCHES  
A –A  
COLUMN  
DECODER  
0
6
5096 FHD F02  
© 1998 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 25074-00 2/98  
1

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