Datasheet > CAT25C64P-1.8-GT3

CAT25C64P-1.8-GT3

更新时间： 2024-11-30 05:08:35

品牌	Logo	应用领域
CATALYST		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
16页	414K
描述
64K-Bit SPI Serial CMOS EEPROM

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中文翻译

获取价格

数据手册

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Not recommended for new designs,

replace with CAT25640

CAT25C64

64K-Bit SPI Serial CMOS EEPROM

FEATURES

DESCRIPTION

I 10 MHz SPI compatible

I 1.8 to 5.5 volt operation

I Hardware and software protection

I Low power CMOS technology

I SPI modes (0,0 &1,1)

TheCAT25C64isa64K-BitSPISerialCMOSEEPROM

internally organized as 8Kx8 bits. Catalyst’s advanced

CMOS Technology substantially reduces device power

requirements. The CAT25C64 features a 64-byte page

write buffer. The device operates via the SPI bus serial

interface and is enabled though a Chip Select (CS). In

addition to the Chip Select, the clock input (SCK), data

in (SI) and data out (SO) are required to access the

device. The HOLD pin may be used to suspend any

serial communication without resetting the serial se-

quence. The CAT25C64 is designed with software and

hardware write protection features including Block write

protection. The device is available in 8-pin DIP and

SOIC packages.

I Commercial, industrial and automotive

temperature ranges

I 1,000,000 program/erase cycles

I 100 year data tetention

I Self-timed write cycle

I 8-pin DIP and SOIC

I 64-Byte page write buffer

I Block write protection

– Protect 1/4, 1/2 or all of EEPROM array

PIN CONFIGURATION

FUNCTIONAL SYMBOL

PDIP (P, L)

SOIC (S, V)

HOLD

SCK

CAT25C64

HOLD

SCK

PIN FUNCTIONS

Pin Name

Function

Serial Data Output

Serial Clock

SCK

Write Protect

V_CC

+1.8V to +5.5V Power Supply

Ground

V_SS

Chip Select

Serial Data Input

Suspends Serial Input

HOLD

Characteristics subject to change without notice

Doc. No. 1112, Rev. B

12 3 4 5 6 7...16

中文翻译

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CAT25C64PA-GT3	CATALYST	获取价格	64K-Bit SPI Serial CMOS EEPROM