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CAT25C64P-1.8TE13 PDF预览

CAT25C64P-1.8TE13

更新时间： 2024-11-30 05:08:35
品牌 Logo 应用领域
CATALYST 可编程只读存储器
页数 文件大小 规格书
9页 101K
描述
64K/128K-Bit SPI Serial CMOS E2PROM

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中文翻译

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CAT25C64P-1.8TE13 数据手册

 浏览型号CAT25C64P-1.8TE13的Datasheet PDF文件第2页浏览型号CAT25C64P-1.8TE13的Datasheet PDF文件第3页浏览型号CAT25C64P-1.8TE13的Datasheet PDF文件第4页浏览型号CAT25C64P-1.8TE13的Datasheet PDF文件第5页浏览型号CAT25C64P-1.8TE13的Datasheet PDF文件第6页浏览型号CAT25C64P-1.8TE13的Datasheet PDF文件第7页 
Advance Information  
CAT25C64/128  
64K/128K-Bit SPI Serial CMOS E2PROM  
FEATURES  
■ 1,000,000 Program/Erase Cycles  
■ 100 Year Data Retention  
■ 5 MHz SPI Compatible  
■ 1.8 to 6.0 Volt Operation  
■ Hardware and Software Protection  
■ Zero Standby Current  
■ Self-Timed Write Cycle  
■ 8-Pin DIP/SOIC, 16-Pin SOIC and 20-Pin TSSOP  
■ 64-Byte Page Write Buffer  
■ Low Power CMOS Technology  
■ SPI Modes (0,0)  
■ Block Write Protection  
– Protect 1/4, 1/2 or all of E2PROM Array  
■ Commercial, Industrial and Automotive  
Temperature Ranges  
DESCRIPTION  
required to access the device. The HOLD pin may be  
used to suspend any serial communication without  
resetting the serial sequence. The CAT25C64/128 is  
designed with software and hardware write protection  
features including Block write protection. The device is  
available in 8-pin DIP, 8-pin SOIC, 16-pin SOIC and 20-  
pin TSSOP packages.  
TheCAT25C64/128isa64K/128K-BitSPISerialCMOS  
E2PROM internally organized as 8Kx8/16Kx8 bits.  
Catalyst’s advanced CMOS Technology substantially  
reduces device power requirements. The CAT25C64/  
128 features a 64-byte page write buffer. The device  
operates via the SPI bus serial interface and is enabled  
thoughaChipSelect(CS). InadditiontotheChipSelect,  
the clock input (SCK), data in (SI) and data out (SO) are  
PIN CONFIGURATION  
BLOCK DIAGRAM  
SOIC Package (S)  
SOIC Package (S16)  
TSSOP Package (U20)  
1
2
3
4
8
7
6
5
V
CS  
SO  
WP  
CC  
16  
1
2
3
4
5
6
7
8
VCC  
HOLD  
NC  
1
NC  
NC  
CS  
SO  
SO  
NC  
NC  
WP  
SS  
NC  
NC  
20  
19  
18  
17  
16  
15  
CS  
SO  
HOLD  
SCK  
SI  
VCC  
HOLD  
HOLD  
NC  
2
15  
14  
13  
12  
11  
10  
9
3
NC  
NC  
NC  
NC  
WP  
VSS  
V
4
SS  
SENSE AMPS  
SHIFT REGISTERS  
NC  
5
6
NC  
NC  
7
14 SCK  
13 SI  
12 NC  
11 NC  
DIP Package (P)  
NC  
V
8
SCK  
SI  
9
1
2
3
4
8
7
6
5
COLUMN  
DECODERS  
V
WORD ADDRESS  
BUFFERS  
CS  
SO  
CC  
10  
HOLD  
SCK  
SI  
WP  
V
SS  
SO  
SI  
I/O  
CONTROL  
PIN FUNCTIONS  
Pin Name  
E2PROM  
ARRAY  
CS  
Function  
SPI  
XDEC  
WP  
CONTROL  
LOGIC  
SO  
Serial Data Output  
Serial Clock  
HOLD  
SCK  
SCK  
WP  
VCC  
VSS  
CS  
BLOCK  
PROTECT  
LOGIC  
Write Protect  
+1.8V to +6.0V Power Supply  
Ground  
DATA IN  
STORAGE  
Chip Select  
SI  
Serial Data Input  
Suspends Serial Input  
HIGH VOLTAGE/  
TIMING CONTROL  
HOLD  
STATUS  
REGISTER  
NC  
No Connect  
25C128 F02  
© 1999 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc No. 25069-00 6/99 SPI-1  
1
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