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C9827JT

更新时间： 2024-02-11 04:20:12
品牌 Logo 应用领域
其他 - ETC 晶体时钟发生器外围集成电路光电二极管
页数 文件大小 规格书
25页 171K
描述
CPU SYSTEM CLOCK GENERATOR|TSSOP|56PIN|PLASTIC

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C9827JT 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP-56针数：56
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.25
JESD-30 代码：R-PDSO-G56JESD-609代码：e0
长度：14 mm湿度敏感等级：1
端子数量：56最高工作温度：70 °C
最低工作温度：最大输出时钟频率：200 MHz
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP56,.3,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：240
电源：3.3 V主时钟/晶体标称频率：14.318 MHz
认证状态：Not Qualified座面最大高度：1.2 mm
子类别：Clock Generators最大压摆率：280 mA
最大供电电压：3.465 V最小供电电压：3.135 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30宽度：6.1 mm
uPs/uCs/外围集成电路类型：CLOCK GENERATOR, PROCESSOR SPECIFICBase Number Matches：1

C9827JT 数据手册

 浏览型号C9827JT的Datasheet PDF文件第1页浏览型号C9827JT的Datasheet PDF文件第3页浏览型号C9827JT的Datasheet PDF文件第4页浏览型号C9827JT的Datasheet PDF文件第5页浏览型号C9827JT的Datasheet PDF文件第6页浏览型号C9827JT的Datasheet PDF文件第7页 
C9827J  
High Performance Pentium® 4 Clock Synthesizer  
Pin Description  
PIN  
NAME  
PWR  
I/O  
I
O
Description  
2
3
XIN  
XOUT  
Oscillator Buffer Input. Connect to a crystal or to an external clock.  
Oscillator Buffer Output. Connect to a crystal. Do not connect when an  
external clock is applied at XIN.  
Differential host output clock pairs. See the frequency table on page one  
of this data sheet for frequencies and functionality.  
PCI Clock Outputs. Are synchronous to 66IN or 3V66 clock. See  
Frequency Table on page one of this data sheet.  
33Mhz PCI clocks, which are ÷2 copies of 66IN or 3V66 clocks, may be  
free running (not stopped when PCI_STP# is asserted low) or may be  
stoppable depending on the programming of SMBus register Byte3, Bits  
(3:5).  
VDD  
VDD  
52, 51, 49,  
48, 45, 44  
10, 11, 12,  
13, 16, 17, 18  
5, 6, 7  
CPU, CPU/  
(0:2)  
PCI(0:6)  
O
O
O
VDDP  
VDD  
PCIF (0:2)  
56  
42  
REF  
IREF  
VDD  
VDD  
O
I
Buffered Output copy of the device’s XIN clock.  
Current reference programming input for CPU buffers. A resistor is  
connected between this pin and VSSIREF. See CPU Clock current Select  
Table in page 18 of this data sheet.  
28  
39  
38  
VTT_PG#  
48MUSB  
48MDOT  
VDD  
I
Qualifying input that latches S (0:2) and MULT0. When this input is at a  
logic low, the S (0:2) and MULT0 are latched  
Fixed 48MHz USB Clock Outputs.  
VDD4  
8
VDD4  
8
O
O
Fixed 48MHZ DOT Clock Outputs.  
33  
35  
3V66_0  
3V66_1/VCH  
VDD  
VDD  
O
O
3.3 Volt 66 MHz fixed frequency clock.  
3.3 volt clock selectable with SMBus byte0, Bit5, when Byte5, Bit5. When  
Byte 0 Bit 5 is at a logic 1, then this pin is a 48M output clock. When  
byte0, Bit5 is a logic 0, then this is a 66M output clock (default).  
This pin is a power down mode pin. A logic low level causes the device to  
enter a power down state. All internal logic is turned off except for the  
SMBus logic. All output buffers are stopped. See the Power Down section  
of this data sheet.  
25  
PD#  
VDD  
I
PU  
43  
MULT0  
I
Programming input selection for CPU clock current multiplier. See CPU  
Clock Current Select Function Table.  
PU  
55, 54  
29  
S(0,1)  
SDATA  
I
I
I
I
Frequency Select Inputs. See Frequency Table on page 1.  
Serial Data Input. Conforms to the SMBus specification of a Slave  
Receive/Transmit device. It is an input when receiving data. It is an open  
drain output when acknowledging or transmitting data. See application  
note AN-0022  
30  
40  
34  
SCLK  
S2  
I
I
Serial Clock Input. Conforms to the SMBus specification. See application  
note AN-0022.  
VDD  
VDD  
I
T
I
Frequency Select input. See Frequency Table on page 1. This is a Tri  
level input, which is driven high, low or driven to a intermediate level.  
PCI Clock Disable Input. When asserted low, PCI (0:6) clocks are  
synchronously disabled in a low state. This pin does not effect PCIF (0:2)  
clocks’ outputs if they are programmed to be PCIF clocks via the device’s  
SMBus interface.  
PCI_STP#  
PU  
Cypress Semiconductor Corporation  
525 Los Coches St.  
Document#: 38-07107 Rev. **  
5/24/2001  
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571  
http://www.cypress.com  
Page 2 of 25  
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