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BUF04AZ/883 PDF预览

BUF04AZ/883

更新时间： 2024-02-06 08:23:55
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
16页 440K
描述
Closed-Loop High Speed Buffer

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中文翻译

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BUF04AZ/883 技术参数

是否无铅： 不含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：DIP
包装说明：CERDIP-8针数：8
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.33.00.01风险等级：5.89
放大器类型：BUFFER最大平均偏置电流 (IIB)：5 µA
标称带宽 (3dB)：110 MHz25C 时的最大偏置电流 (IIB)：5 µA
最大输入失调电压：1000 µVJESD-30 代码：R-GDIP-T8
JESD-609代码：e0负供电电压上限：-18 V
标称负供电电压 (Vsup)：-15 V功能数量：1
端子数量：8最高工作温度：125 °C
最低工作温度：-55 °C最小输出电流：0.05 A
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装等效代码：DIP8,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：+-5/+-15 V认证状态：Not Qualified
筛选级别：38535Q/M;38534H;883B座面最大高度：5.08 mm
最小摆率：2000 V/us标称压摆率：3000 V/us
子类别：Buffer Amplifier最大压摆率：8.5 mA
供电电压上限：18 V标称供电电压 (Vsup)：15 V
表面贴装：NO技术：BIPOLAR
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.62 mmBase Number Matches：1

BUF04AZ/883 数据手册

 浏览型号BUF04AZ/883的Datasheet PDF文件第6页浏览型号BUF04AZ/883的Datasheet PDF文件第7页浏览型号BUF04AZ/883的Datasheet PDF文件第8页浏览型号BUF04AZ/883的Datasheet PDF文件第10页浏览型号BUF04AZ/883的Datasheet PDF文件第11页浏览型号BUF04AZ/883的Datasheet PDF文件第12页 
BUF04  
DLY  
375.0ns  
100  
90  
100  
90  
INPUT  
INPUT  
(50mV/DIV)  
(2V/DIV)  
OUTPUT  
(50mV/DIV)  
OUTPUT  
(2V/DIV)  
10  
10  
0%  
0%  
50mV  
50mV  
10ns  
2V  
2V  
50ns  
V
= ±15V, R = 2kΩ, C = 15pF  
L L  
S
V
= ±15V, R = 2kΩ, C = 15pF  
L L  
S
Figure 25. Small-Signal Transient Response  
Figure 26. Large-Signal Transient Response  
AUDIO PRECISION BUF04 THD+N (%) vs FREQ (Hz)  
0.1  
07 MAR 93 21:31:53  
12  
V
T
= ±15V  
S
9
6
3
= +25°C  
A
A
: V = 7.75V  
IN  
R
R
= 150W  
= 600W  
: V = 0.775V  
IN  
R
R
= 150W  
= 600W  
C
D
V
= ±15V  
rms,  
L
rms,  
L
S
Ω
R
= 150  
L
LPF=80kHz  
B
: V = 7.75V  
IN  
: V = 0.775V  
IN  
rms,  
L
rms,  
L
A
C
= 100pF  
L
0.010  
C
= 50pF  
C
L
C
= 0pF  
0
L
B
C
D
–3  
–6  
Ω
150  
10  
0.001  
D
BUF04  
Ω
C
L
–9  
T
–12  
10k  
0.0001  
20  
100  
1k  
10k  
20k  
100k  
1M  
10M  
100M  
1000M  
FREQUENCY – Hz  
Figure 27. THD + Noise vs. Amplitude  
FUNCTIONAL DESCRIPTION  
Figure 28. Bandwidth vs. Frequency  
The BUF04 is a closed-loop voltage buffer based on a current  
feedback architecture. Its high open-loop transimpedance, high  
output current drive capability, and its low input offset voltage  
makes it useful in a variety of applications, such as buffering the  
inputs of sampling and flash A/D converters, audio and video  
line drivers, active filters, and precision op amp hoosters.  
Q11  
Q13  
Q5  
Q7  
Q3  
C1  
Q9  
R
100Ω  
FB  
D1  
D2  
A transistor-level equivalent circuit for the BUF04 is illustrated  
in Figure 29. The input stage consists of a pair of emitter  
follower transistors, Q1 and Q2, whose outputs drive a second  
set of transistors, Q3 and Q4. The emitters of Q3 and Q4 are  
connected together through diodes, D1 and D2, to form a low  
impedance input for the feedback signal (in current mode) from  
the output stage. The outputs of Q3 and Q4 are then  
“mirrored” to Q5 and Q6 which form the gain stage of the  
BUF04. The signal is taken from the collectors of Q5 and Q6  
which drive a “Darlington-connected” output stage made up of  
transistors Q7-Q10. Three R-C networks (R1–C1, R2–C2, and  
R3–C3) form feed-forward paths which bypass certain sections  
of the BUF04 for improved high frequency performance and  
capacitive load drive capability. Since the signal conveyed  
internally in the BUF04 is a current, the frequency response  
and slew rate of the BUF04 are insensitive to supply voltage  
variations.  
Ω
20  
C3  
R3  
Q2  
V
IN  
V
OUT  
Q1  
Ω
R2  
20  
Q10  
Q4  
C2  
Q8  
Q14  
Q6  
Q12  
Figure 29. Transistor-Level Equivalent Circuit  
An interesting feature of the BUF04 architecture is the use of  
“slew-enhancement” transistors, Q11–Q14. Under normal small  
signal (VIN < 2 Vbes) conditions, these transistors are normally  
“OFF.” In large signals, high speed transient applications where  
the input signal is > 2 Vbes, these transistors turn on and literally  
“brute-force” the output to follow the input. When the input  
signal drops below 2 Vbes, the transistors return to their  
normally “OFF” state.  
REV. 0  
–9–  
1...6789101112...16

中文翻译

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