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BUF04AZ/883 PDF预览

BUF04AZ/883

更新时间： 2024-02-11 04:46:11
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
16页 440K
描述
Closed-Loop High Speed Buffer

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BUF04AZ/883 技术参数

是否无铅： 不含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：DIP
包装说明：CERDIP-8针数：8
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.33.00.01风险等级：5.89
放大器类型：BUFFER最大平均偏置电流 (IIB)：5 µA
标称带宽 (3dB)：110 MHz25C 时的最大偏置电流 (IIB)：5 µA
最大输入失调电压：1000 µVJESD-30 代码：R-GDIP-T8
JESD-609代码：e0负供电电压上限：-18 V
标称负供电电压 (Vsup)：-15 V功能数量：1
端子数量：8最高工作温度：125 °C
最低工作温度：-55 °C最小输出电流：0.05 A
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装等效代码：DIP8,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：+-5/+-15 V认证状态：Not Qualified
筛选级别：38535Q/M;38534H;883B座面最大高度：5.08 mm
最小摆率：2000 V/us标称压摆率：3000 V/us
子类别：Buffer Amplifier最大压摆率：8.5 mA
供电电压上限：18 V标称供电电压 (Vsup)：15 V
表面贴装：NO技术：BIPOLAR
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.62 mmBase Number Matches：1

BUF04AZ/883 数据手册

 浏览型号BUF04AZ/883的Datasheet PDF文件第8页浏览型号BUF04AZ/883的Datasheet PDF文件第9页浏览型号BUF04AZ/883的Datasheet PDF文件第10页浏览型号BUF04AZ/883的Datasheet PDF文件第12页浏览型号BUF04AZ/883的Datasheet PDF文件第13页浏览型号BUF04AZ/883的Datasheet PDF文件第14页 
BUF04  
Output Current Transient Recovery  
t
59.00ns  
∆
Settling characteristics of high speed buffers also include the  
buffer’s ability to recover, i.e., settle, from a transient output  
current load condition. When driving the input of an A/D  
converter, especially the successive-approximation converter  
types, the buffer must maintain a constant output voltage under  
dynamically changing load current conditions. In these types of  
converters, the comparison point is usually diode-clamped, but  
it may deviate several hundred millivolts resulting in high  
frequency modulation of the A/D input current. Open-loop and  
closed-loop buffers (also, op amps configured as followers) that  
exhibit high closed-loop output impedances and/or low unity  
gain crossover frequencies recover very slowly from output load  
current transients. This slow recovery leads to linearity errors or  
missing codes because of errors in the instantaneous input volt-  
age. Therefore, the buffer (or op amp) chosen for this type of  
application should exhibit low output impedance and high unity  
gain bandwidth so that its output has had a chance to settle to  
its nominal value before the converter makes its comparison.  
25mA  
I
SOURCE  
100  
90  
(4mA/DIV)  
35mA  
10  
V
OUT  
0%  
(5mV/DIV)  
100mV  
5mV  
20ns  
Figure 35. BUF04’s Output Load Current Recovery Time  
Terminated Line Drivers  
The BUF04’s high output current, large slew rate, and wide  
bandwidth all combine to make it an ideal device for high speed  
line driver applications. As shown in Figure 36, the BUF04 can  
be configured for driving doubly terminated 50 Ω and 75 Ω  
cables. To optimize the circuit’s pulse response, a capacitor, CT  
(CX + CTRIM), is connected across the series back termination.  
The BUF04 can drive a 50 Ω line to ±2.5 V and a 75 Ω line to  
±3.75 V when operating on ±15 V supplies.  
The circuit in Figure 34 illustrates a settling measurement  
circuit for evaluating the recovery time of high speed buffers  
from an output load current transient. The input to the buffer is  
grounded for ease of measuring the recovery time, and two  
resistors are used to sum steady-state and transient load currents  
at the output. As a worst-case condition, R1, was chosen such  
that the BUF04 would source (or sink) a steady-state current of  
25 mA. R2 was then chosen to add a 10 mA transient current  
upon the steady-state value. To set accurately the nodal voltages  
internal to the BUF04, the supply voltages were offset by the  
voltage applied to R1. Because of its high transimpedance, wide  
bandwidth, and low output impedance, the BUF04 exhibits an  
extremely fast recovery time of 60 ns to 0.01%, as shown in  
Figure 34. Results were identical regardless whether the BUF04  
was sourcing or sinking current.  
C
T
C
X
6'  
COAX  
R
X
6
3
V
IN  
BUF04  
R
R
L
S
Z
COAX  
R , R  
S
50Ω  
75Ω  
R
C
C
T
O
L
X
X
50Ω RG-58  
75Ω RG-59  
50  
75  
91pF 3–15pF  
62pF 3–15pF  
Figure 36. Line Driver Configuration  
Low-Pass Active Filter  
In many signal-conditioning applications, filters are required to  
band-limit noise or altogether eliminate other unwanted signals  
prior to conversion. Often, high frequency filters are needed for  
these applications; however, there are few op amps that exhibit  
the high open-loop gain and wide unity-gain crossover  
frequency required for these applications. As illustrated in  
Figure 37, the BUF04 and a handful of passive components can  
be configured as a high frequency, low-pass active filter. Since  
the filter configuration is a unity-gain Sallen-Key topology, the  
BUF04 is particularly well suited for this application. In this  
circuit, an additional resistor, R3, was added to prevent  
interaction between C2 and the BUF04’s input capacitance.  
V+  
10µF  
0.1µF  
TP2  
TP1  
7
R2  
250Ω  
6
3
V
BUF04  
IN  
R1  
200Ω  
SOURCE: 0➔ –2.5 V  
SINK: 0➔ +2.5V  
0.1µF  
4
V
LOAD  
10µF  
SOURCE: –5V  
SINK: +5V  
V–  
Figure 34. Transient Output Load Current Test Circuit  
C1*  
44pF (22pF x 2)  
R1  
R2  
R3  
499Ω  
499Ω  
47Ω  
6
3
V
V
IN  
OUT  
BUF04  
C2*  
22pF  
* SILVERED MICA OR  
DIPPED CERAMIC  
1
C1  
;
Q =  
4 · C2  
W
=
R1 · R2 · C1 · C2  
O
Figure 37. A 10 MHz Low-Pass Active Filter  
REV. 0  
–11–  
1...891011121314...16

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