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BU9881F PDF预览

BU9881F

更新时间: 2024-02-08 00:51:31
品牌 Logo 应用领域
其他 - ETC 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
12页 142K
描述
I2C Serial EEPROM

BU9881F 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:LSOP,针数:8
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:R-PDSO-G8长度:5 mm
功能数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:1.6 mm最大压摆率:3 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2.7 V
表面贴装:YES温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

BU9881F 数据手册

 浏览型号BU9881F的Datasheet PDF文件第6页浏览型号BU9881F的Datasheet PDF文件第7页浏览型号BU9881F的Datasheet PDF文件第8页浏览型号BU9881F的Datasheet PDF文件第9页浏览型号BU9881F的Datasheet PDF文件第11页浏览型号BU9881F的Datasheet PDF文件第12页 
Standard ICs  
BU9881 / BU9881F  
(2) Read cycle  
MODE “L”  
VCLK Don't Care  
Start condition  
Stop condition  
18  
SCL  
SDA  
8
1
1
1
9
D2 D1  
D6 D5  
Read data  
D0  
1
D7  
1
0
0
0
0
0
Slave address  
ACK signal (output)  
ACK signal (input)  
Fig. 13 Current read cycle  
1) With this IC, an internal address counter circuit increments the address one address at a time, and stores in  
memory the last word address (n address) for which the Write or read command was executed.  
2) This command reads only the data of the word address (n +1 address) following the last word address to be writ-  
ten after the previous command has been executed.  
3) If the ACK signal LOW following D0 is detected and no stop condition is sent from the master (microcomputer)  
side, reading can be continued sequentially to the data of the next word address.  
[The entire 1 kilobit (128 words) can be read.]  
(Refer to "Fig. 15 Sequential read cycle.")  
4) To terminate this command, HIGH is input for the ACK signal following D0, and the SDA signal rises at the HIGH  
state of the SCL signal (stop condition), terminating the command.  
MODE“L”  
VCLK Don't Care  
Stop condition  
Start condition  
Start condition  
SCL  
SDA  
0
1
0
0
0
0
0
0
0
1
0
0
0
0
1
D7  
D0  
1
1
×
WA6  
WA0  
1
Word  
address  
Slave address  
Read  
data  
Slave address  
ACK signal (input)  
ACK signal (output)  
Fig. 14 Random read cycle  
5) This command enables reading of the data at the specified word address.  
6) If the ACK signal LOW following D0 is detected and no stop condition is sent from the master (microcomputer)  
side, reading can be continued sequentially to the data of the next word address.  
[The entire 1 kilobit (128 words) can be read.]  
(Refer to "Fig. 15 Sequential read cycle.")  
7) To terminate this command, HIGH is input for the ACK signal following D0, and the SDA signal rises at the HIGH  
state of the SCL signal (stop condition), terminating the command.  
10  

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