Datasheet > BU9795AFV-LBE2

BU9795AFV-LBE2

更新时间： 2024-02-11 01:50:45

品牌	Logo	应用领域
罗姆 - ROHM		/
页数	文件大小	规格书
29页	862K
描述
Standard LCD Segment Drivers

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数据手册

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BU9795AFV-LBE2 数据手册

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BU9795AFV-LB

MAX 108 segments (SEG27×COM4)

OSCILLATOR

There are two kinds of clock for logic and analog circuit; from internal oscillator circuit or external clock input. If internal

oscillator circuit will be used, OSCIN must be connected to VSS.

(Note) When you use external clock, execute ICSET command and connect OSCIN to external clock.

Clock input

OSCIN

BU9795AFV-LB

OSCIN

BU9795AFV-LB

VSS

Figure 10. Internal oscillator circuit mode

Figure 11. External clock mode

LCD Driver Bias Circuit

This LSI generates LCD driving voltage with on-chip Buffer AMP.

And it can drive LCD at low power consumption.

1/3 and 1/2Bias can be set in MODESET command.

Line and frame inversion can be set in DISCTL command.

Refer to “LCD driving waveform” about each LCD driving waveform.

Blink timing generator

This device has Blinking function.

This LSI is able to set blink mode with BLKCTL command.

Blink frequency varies widely by characteristic of fCLK, when internal oscillation circuit.

Refer to Oscillation Characteristics for more details on fCLK.

Reset (initial) condition

Initial condition after execute SOFTWARE RESET is as follows.

・Display is OFF.

・DDRAM address is initialized (DDRAM Data is not initialized).

Refer to Command Description about initialize value of register.

Command / Function List

Description List of Command / Function

No.

Command

Mode Set (MODESET)

Function

Set LCD drive mode

Address Set (ADSET)

Set LCD display mode 1

Set LCD display mode 2

Set IC operation

Display Control (DISCTL)

Set IC Operation (ICSET)

Blink Control (BLKCTL)

All Pixel Control (APCTL)

Set blink mode

Set pixel condition

www.rohm.com

TSZ02201-0P4P0D300510-1-2

26.Feb.2014 Rev.002

8/26

TSZ22111･15･001

1...5 6 789 10 11...29

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