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BS62LV2009DCG55 PDF预览

BS62LV2009DCG55

更新时间： 2024-11-05 22:25:51
品牌 Logo 应用领域
BSI 静态存储器
页数 文件大小 规格书
9页 320K
描述
Very Low Power/Voltage CMOS SRAM 256K X 8 bit

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BS62LV2009DCG55 数据手册

 浏览型号BS62LV2009DCG55的Datasheet PDF文件第2页浏览型号BS62LV2009DCG55的Datasheet PDF文件第3页浏览型号BS62LV2009DCG55的Datasheet PDF文件第4页浏览型号BS62LV2009DCG55的Datasheet PDF文件第5页浏览型号BS62LV2009DCG55的Datasheet PDF文件第6页浏览型号BS62LV2009DCG55的Datasheet PDF文件第7页 
Very Low Power/Voltage CMOS SRAM  
256K X 8 bit  
BSI  
BS62LV2009  
„ FEATURES  
„ DESCRIPTION  
• Vcc operation voltage : 2.4V ~ 3.6V  
• Very low power consumption :  
The BS62LV2009 is a high performance, very low power CMOS  
Static Random Access Memory organized as 262,144 words by 8 bits  
and operates from a range of 2.4V to 3.6V supply voltage.  
Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with a typical CMOS standby current of  
0.3uA at 3.0V/25oC and maximum access time of 55ns at 3.0V/85oC.  
Easy memory expansion is provided by an active LOW chip  
enable (CE1), an active HIGH chip enable (CE2), and active LOW  
output enable (OE) and three-state output drivers.  
Vcc = 3.0V C-grade: 22mA (@55ns) operating current  
I -grade: 23mA (@55ns) operating current  
C-grade: 17mA (@70ns) operating current  
I -grade: 18mA (@70ns) operating current  
0.3uA(Typ.) CMOS standbycurrent  
• High speed access time :  
-55  
-70  
55ns  
70ns  
The BS62LV2009 has an automatic power down feature, reducing the  
power consumption significantly when chip is deselected.  
The BS62LV2009 is available in DICE form, JEDEC standard 32 pin  
450mil Plastic SOP, 8mmx13.4mm STSOP and 8mmx20mm TSOP.  
• Automatic power down when chip is deselected  
• Three state outputs and TTL compatible  
• Fully static operation  
• Data retention supply voltage as low as 1.5V  
• Easy expansion with CE2, CE1, and OE options  
„ PRODUCT FAMILY  
POWER DISSIPATION  
SPEED  
( ns )  
STANDBY  
Operating  
PRODUCT  
FAMILY  
OPERATING  
TEMPERATURE  
Vcc  
RANGE  
( ICCSB1, Max )  
( ICC, Max )  
PKG TYPE  
55ns: 3.0~3.6V  
70ns: 2.7~3.6V  
Vcc=3.0V  
Vcc=3.0V  
55ns  
70ns  
BS62LV2009DC  
BS62LV2009TC  
BS62LV2009STC  
BS62LV2009SC  
BS62LV2009DI  
BS62LV2009TI  
BS62LV2009STI  
BS62LV2016SI  
DICE  
TSOP-32  
STSOP-32  
SOP-32  
DICE  
TSOP-32  
STSOP-32  
SOP-32  
+0 O C to +70O  
-40 O C to +85O  
C
C
2.4V ~3.6V  
2.4V ~ 3.6V  
55/70  
55/70  
22mA  
23mA  
3uA  
17mA  
5uA  
18mA  
„ BLOCK DIAGRAM  
„ PIN CONFIGURATIONS  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
A11  
A9  
A8  
OE  
A10  
CE1  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
GND  
DQ2  
DQ1  
DQ0  
A0  
A13  
A17  
A13  
WE  
CE2  
A15  
VCC  
A17  
A16  
A14  
A12  
A7  
A15  
A16  
A14  
Address  
Memory Array  
20  
1024  
BS62LV2009TC  
BS62LV2009STC  
BS62LV2009TI  
BS62LV2009STI  
Row  
Input  
A12  
A7  
A6  
A5  
A4  
9
1024 x 2048  
Decoder  
Buffer  
10  
11  
12  
13  
14  
15  
16  
A6  
A5  
A4  
A1  
A2  
A3  
2048  
DQ0  
DQ1  
DQ2  
DQ3  
DQ4  
DQ5  
DQ6  
DQ7  
8
Data  
Input  
Buffer  
8
Column I/O  
Write Driver  
Sense Amp  
A17  
A16  
A14  
A12  
A7  
1
VCC  
A15  
CE2  
WE  
32  
8
2
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
8
Data  
Output  
Buffer  
3
256  
4
5
A13  
A8  
Column Decoder  
16  
A6  
6
A5  
7
A9  
BS62LV2009SC  
BS62LV2009SI  
A4  
8
A11  
OE  
CE1  
CE2  
A3  
9
Control  
Address Input Buffer  
A2  
10  
11  
12  
13  
14  
15  
16  
A10  
CE1  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
WE  
OE  
Vdd  
Gnd  
A1  
A0  
DQ0  
DQ1  
DQ2  
GND  
A9 A8 A3 A2 A1 A0 A10  
A11  
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.  
Revision 1.1  
Jan. 2004  
R0201-BS62LV2009  
1
1234567...9

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