Datasheet > BS62LV2007HIP70

BS62LV2007HIP70

更新时间： 2024-11-03 03:53:19

品牌	Logo	应用领域
BSI		静态存储器
页数	文件大小	规格书
8页	241K
描述
Standard SRAM, 256KX8, 70ns, CMOS, PBGA36

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BS62LV2007HIP70 数据手册

Very Low Power/Voltage CMOS SRAM

256K X 8 bit

BS62LV2007

BSI

DESCRIPTION

FEATURES

The BS62LV2007 is a high performance , very low power CMOS

Static Random Access Memory organized as 262,144 words by 8 bits

and operates in a wide range of 2.4V to 5.5V supply voltage.

Advanced CMOS technology and circuit techniques provide both high

speed and low power features with a typical CMOS standby current of

0.1uA and maximum access time of 70ns in 3V operation.

Easy memory expansion is provided by an active LOW chip

enable (CE1), an active HIGH chip enable (CE2), and active LOW

output enable (OE) and three-state output drivers.

• Wide Vcc operation voltage : 2.4V ~ 5.5V

• Very low power consumption :

Vcc = 3.0V C-grade : 20mA (Max.) operating current

I- grade : 25mA (Max.) operating current

0.1uA (Typ.) CMOS standby current

Vcc = 5.0V C-grade : 35mA (Max.) operating current

I- grade : 40mA (Max.) operating current

0.6uA (Typ.) CMOS standby current

• High speed access time :

The BS62LV2007 has an automatic power down feature, reducing the

power consumption significantly when chip is deselected.

The BS62LV2007 is available in the JEDEC standard 36 ball Mini

BGA 6x8 mm.

-70

-10

70ns(Max.) at Vcc = 3.0V

100ns(Max.) at Vcc = 3.0V

• Automatic power down when chip is deselected

• Three state outputs and TTL compatible

• Fully static operation

• Data retention supply voltage as low as 1.5V

• Easy expansion with CE2, CE1, and OE options

PRODUCT FAMILY

POWER DISSIPATION

SPEED

(ns)

STANDBY

Operating

(I , Max)

PRODUCT

FAMILY

OPERATING

TEMPERATURE

Vcc

RANGE

PKG

TYPE

, Max)

CCSB1

Vcc=

3.0V

Vcc=

5.0V

Vcc=

3.0V

Vcc=

5.0V

Vcc=

3.0V

BS62LV2007HC

BS62LV2007HI

0 ^OC to +70 ^O

70/100

6 uA

0.7 uA

35 mA

20 mA

25 mA

BGA-36-

0608

2.4V ~5.5V

-40 ^OC to +85 ^O

25 uA

1.5 uA

40 mA

BLOCK DIAGRAM

PIN CONFIGURATIONS

A13

A17

A15

A16

A14

Address

Memory Array

1024 x 2048

1024

Row

Input

A12

Decoder

Buffer

2048

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

Data

Input

Buffer

Column I/O

Write Driver

Sense Amp

Data

Output

Buffer

256

Column Decoder

CE1

CE2

Control

Address Input Buffer

Vdd

Gnd

A9 A8 A3 A2 A1 A0 A10

A11

Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.

Revision 2.1

Jan. 2004

R0201-BS62LV2007

12 3 4 5 6 7 8

中文翻译

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与BS62LV2007HIP70相关器件

型号	品牌	获取价格	描述	数据表
BS62LV2008	BSI	获取价格	Very Low Power/Voltage CMOS SRAM 256K X 8 bit
BS62LV2008DC	BSI	获取价格	Very Low Power/Voltage CMOS SRAM 256K X 8 bit
BS62LV2008DC-55	BSI	获取价格	Very Low Power/Voltage CMOS SRAM 256K X 8 bit
BS62LV2008DC-70	BSI	获取价格	Very Low Power/Voltage CMOS SRAM 256K X 8 bit
BS62LV2008DCG55	BSI	获取价格	Very Low Power/Voltage CMOS SRAM 256K X 8 bit
BS62LV2008DCG70	BSI	获取价格	Very Low Power/Voltage CMOS SRAM 256K X 8 bit
BS62LV2008DCP55	BSI	获取价格	Very Low Power/Voltage CMOS SRAM 256K X 8 bit
BS62LV2008DCP70	BSI	获取价格	Very Low Power/Voltage CMOS SRAM 256K X 8 bit
BS62LV2008DI	BSI	获取价格	Very Low Power/Voltage CMOS SRAM 256K X 8 bit
BS62LV2008DI-55	BSI	获取价格	Very Low Power/Voltage CMOS SRAM 256K X 8 bit

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