Ultra Low Power/Voltage CMOS SRAM
512K X 16 bit
BSI
BS616UV8011
DESCRIPTION
FEATURES
The BS616UV8011 is a high performance, ultra low power CMOS Static
Random Access Memory organized as 524,288 words by 16 bits and
operates from a wide range of 1.8V to 2.3V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 0.6uA and maximum access time of 70/100ns in 2V operation.
Easy memory expansion is provided by an active LOW chip enable(CE1),
active HIGH chip enable (CE2), active LOW output enable(OE) and
three-state output drivers.
• Ultra low operation voltage : 1.8 ~ 2.3V
• Ultra low power consumption :
Vcc = 2.0V C-grade: 20mA (Max.) operating current
I-grade : 25mA (Max.) operating current
0.6uA (Typ.) CMOS standby current
• High speed access time :
-70
-10
70ns (Max.) at Vcc=2V
100ns (Max.) at Vcc=2V
The BS616UV8011 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
The BS616UV8011 is available in 48-pin BGA package.
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE2,CE1 and OE options
• I/O Configuration x8/x16 selectable by LB and UB pin
PRODUCT FAMILY
POWER DISSIPATION
SPEED
(ns)
Vcc
RANGE
OPERATING
TEMPERATURE
STANDBY
Operating
PRODUCT FAMILY
PKG TYPE
CCSB1
(I
, Max)
CC
(I
, Max)
Vcc=2V
70 / 100
Vcc=2V
Vcc=2V
20mA
BS616UV8011DC
BS616UV8011BC
BS616UV8011FC
BS616UV8011DI
BS616UV8011BI
BS616UV8011FI
DICE
+0OC to +70O 1.8 ~ 2.3V
C
15uA
BGA-48 -0810
BGA-48 -0912
DICE
40OC to +85OC 1.8 ~ 2.3V
-
20uA
25mA
70 / 100
BGA-48 -0810
BGA-48 -0912
PIN CONFIGURATIONS
BLOCK DIAGRAM
A4
A3
A2
1
2
3
4
5
6
A1
A0
A17
A16
A15
A14
A13
A12
Address
Input
A0
A1
A2
CE2
A
B
C
D
E
F
LB
D8
OE
22
2048
Row
Memory Array
2048 x 4096
Buffer
A3
A5
A4
A6
D0
D2
CE1
D1
D3
D4
D5
UB
Decoder
D9
D10
4096
Data
16
16
Column I/O
Input
D0
VSS D11
A17
A7
Buffer
VCC
VSS
D6
.
.
.
.
.
.
.
.
Write Driver
Sense Amp
16
256
D12
D13
N.C
A8
A16
A15
A13
A10
Data
VCC
D14
D15
A18
VSS
A14
A12
A9
16
Output
Buffer
Column Decoder
D15
CE2
16
CE1
WE
OE
D7
WE
G
H
Control
Address Input Buffer
UB
LB
A11 A10 A9 A8 A7
A6 A5 A18
A11
NC
Vcc
Gnd
48-Ball CSP top View
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.
Revision 2.2
April 2001
R0201-BS616UV8011
1