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BS616UV8021BI

更新时间: 2024-11-18 22:56:39
品牌 Logo 应用领域
BSI 静态存储器
页数 文件大小 规格书
12页 216K
描述
Ultra Low Power/Voltage CMOS SRAM 512K x 16 or 1M x 8 bit switchable

BS616UV8021BI 数据手册

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Ultra Low Power/Voltage CMOS SRAM  
512K x 16 or 1M x 8 bit switchable  
BSI  
BS616UV8021  
„ DESCRIPTION  
„ FEATURES  
The BS616UV8021 is a high performance, ultra low power CMOS Static  
Random Access Memory organized as 524,288 words by 16 bits or  
1,048,576 bytes by 8 bits selectable by CIO pin and operates from a wide  
range of 1.8V to 2.3V supply voltage.  
• Ultra low operation voltage : 1.8 ~ 2.3V  
• Ultra low power consumption :  
Vcc = 2.0V C-grade: 20mA (Max.) operating current  
I-grade : 25mA (Max.) operating current  
0.6uA (Typ.) CMOS standby current  
• High speed access time :  
Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with a typical CMOS standby current  
of 0.6uA and maximum access time of 70/100ns in 2.0V operation.  
Easy memory expansion is provided by an active HIGH chip  
enable2(CE2), active LOW chip enable1(CE1), active LOW output  
enable(OE) and three-state output drivers.  
-70  
70ns (Max.) at Vcc=2.0V  
-10 100ns (Max.) at Vcc=2.0V  
• Automatic power down when chip is deselected  
• Three state outputs and TTL compatible  
• Fully static operation  
The BS616UV8021 has an automatic power down feature, reducing the  
power consumption significantly when chip is deselected.  
• Data retention supply voltage as low as 1.5V  
• Easy expansion with CE1, CE2 and OE options  
• I/O Configuration x8/x16 selectable by CIO, LB and UB pin  
The BS616UV8021 is available in DICE form and 48-pin BGA type.  
„ PRODUCT FAMILY  
POWER DISSIPATION  
SPEED  
(ns)  
STANDBY  
Operating  
PRODUCT  
FAMILY  
OPERATING  
Vcc RANGE  
PKG TYPE  
(ICCSB1, Max)  
(ICC, Max)  
TEMPERATURE  
Vcc=2.0V  
Vcc=2.0V  
Vcc=2.0V  
BS616UV8021DC  
BS616UV8021BC  
BS616UV8021FC  
BS616UV8021DI  
BS616UV8021BI  
BS616UV8021FI  
DICE  
+0 O C to +70O  
-40 O C to +85O  
C
C
1.8V ~ 2.3V  
1.8V ~ 2.3V  
70 / 100  
15uA  
20mA  
BGA-48-0810  
BGA-48-0912  
DICE  
70 / 100  
20uA  
25mA  
BGA-48-0810  
BGA-48-0912  
„ BLOCK DIAGRAM  
„ PIN CONFIGURATIONS  
A15  
A14  
A13  
1
2
3
4
5
6
A12  
A11  
A10  
A9  
Address  
Input  
CE2  
A
B
C
D
E
F
LB  
OE  
A0  
A1  
A2  
22  
2048  
Row  
Memory Array  
2048 x 4096  
Buffer  
A8  
Decoder  
D0  
D2  
D8  
D9  
UB  
A3  
A5  
A4  
A6  
CE1  
D1  
A17  
A7  
A6  
D10  
4096  
Data  
16(8)  
16(8)  
Column I/O  
Input  
D0  
Buffer  
D11  
D12  
D13  
A17  
Vss  
A14  
A12  
A9  
VSS  
A7  
D3  
D4  
D5  
VCC  
VSS  
D6  
.
.
.
.
.
.
.
.
Write Driver  
Sense Amp  
16(8)  
16(8)  
256(512)  
Data  
A16  
VCC  
D14  
D15  
A18  
Output  
Buffer  
Column Decoder  
D15  
A15  
A13  
A10  
CE1  
CE2  
WE  
OE  
UB  
16(18)  
Control  
Address Input Buffer  
CI.O  
A8  
G
H
WE  
D7  
LB  
CIO  
A16 A0 A1 A2 A3 A4  
A5 A18  
(SAE)  
A11  
SAE.  
Vdd  
Vss  
48-Ball CSP top View  
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.  
Revision 2.2  
April 2001  
R0201-BS616UV8021  
1

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