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BS616LV1013

更新时间: 2024-11-25 21:53:59
品牌 Logo 应用领域
BSI 静态存储器
页数 文件大小 规格书
9页 259K
描述
Very Low Power/Voltage CMOS SRAM 64K X 16 bit

BS616LV1013 数据手册

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Very Low Power/Voltage CMOS SRAM  
64K X 16 bit  
BSI  
BS616LV1013  
„ FEATURES  
„ DESCRIPTION  
• Very low operation voltage : 2.7 ~ 3.6V  
The BS616LV1013 is a high performance, very low power CMOS Static  
Random Access Memory organized as 65,536 words by 16 bits and  
operates from a wide range of 2.7V to 3.6V supply voltage.  
Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with a typical CMOS standby current  
of 0.02uA and maximum access time of 70ns in 3.0V operation.  
Easy memory expansion is provided by an active LOW chip  
enable(CE) and active LOW output enable(OE) and three-state output  
drivers.  
The BS616LV1013 has an automatic power down feature, reducing the  
power consumption significantly when chip is deselected.  
The BS616LV1013 is available in the JEDEC standard 44-pin TSOP  
Type II and 48-pin BGA package.  
• Very low power consumption :  
Vcc = 3.0V  
C-grade : 20mA (Max.) operating current  
I-grade : 25mA (Max.) operating current  
0.02uA (Typ.) CMOS standby current  
High speed access time :  
-70  
70ns (Max.) at Vcc = 3.0V  
• Automatic power down when chip is deselected  
• Three state outputs and TTL compatible  
• Fully static operation  
• Data retention supply voltage as low as 1.5V  
• Easy expansion with CE and OE options  
• I/O Configuration x8/x16 selectable by LB and UB pin  
„ PRODUCT FAMILY  
POWER DISSIPATION  
SPEED  
(ns)  
Vcc  
RANGE  
PRODUCT  
FAMILY  
OPERATING  
TEMPERATURE  
STANDBY  
Operating  
PKG TYPE  
(ICCSB1, Max)  
(ICC, Max)  
Vcc=3.0 V  
Vcc=3.0 V  
Vcc=3.0V  
BS616LV1013EC  
BS616LV1013AC  
TSOP2-44  
+0O C to +70O  
C
2.7V ~ 3.6V  
70  
20mA  
0.5uA  
BGA-48-0608  
BS616LV1013EI  
BS616LV1013AI  
TSOP2-44  
-40O C to +85O C 2.7V ~ 3.6V  
70  
1.5uA  
25mA  
BGA-48-0608  
„ PIN CONFIGURATIONS  
„ BLOCK DIAGRAM  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
A4  
A3  
A2  
A1  
A0  
CE  
DQ0  
DQ1  
DQ2  
DQ3  
VCC  
GND  
DQ4  
DQ5  
DQ6  
DQ7  
A5  
A6  
A7  
OE  
UB  
LB  
A8  
A13  
DQ15  
DQ14  
DQ13  
DQ12  
GND  
VCC  
DQ11  
DQ10  
DQ9  
DQ8  
NC  
A8  
A9  
A10  
A11  
NC  
Address  
A15  
18  
512  
A14  
A12  
A7  
BS616LV1013EC  
BS616LV1013EI  
Input  
Row  
Decoder  
Memory Array  
512 x 2048  
Buffer  
A6  
A5  
A4  
17  
18  
19  
20  
21  
22  
WE  
A15  
A14  
A13  
A12  
NC  
2048  
Data  
Input  
Buffer  
16  
16  
16  
Column I/O  
DQ0  
.
.
.
.
.
.
.
.
Write Driver  
Sense Amp  
1
2
3
4
5
6
128  
Data  
Output  
16  
A
B
C
D
E
F
LB  
OE  
UB  
A0  
A3  
A1  
A4  
A2  
NC  
IO0  
IO2  
Buffer  
Column Decoder  
DQ15  
IO8  
CE  
14  
CE  
WE  
OE  
UB  
IO9  
IO10  
IO11  
IO12  
IO13  
NC  
A5  
A6  
IO1  
IO3  
IO4  
IO5  
WE  
A11  
Control  
Address Input Buffer  
VSS  
VCC  
IO14  
IO15  
NC  
NC  
NC  
A14  
A12  
A9  
A7  
VCC  
VSS  
IO6  
IO7  
NC  
LB  
A11 A9 A3 A2 A1  
A0 A10  
NC  
A15  
A13  
A10  
Vcc  
Gnd  
G
H
A8  
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.  
Revision 1.1  
R0201-BS616LV1013  
1
Jan.  
2004  

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