Datasheet > BQ4850Y_13

BQ4850Y_13

更新时间： 2024-11-06 12:27:35

品牌	Logo	应用领域
德州仪器 - TI		静态存储器
页数	文件大小	规格书
17页	1153K
描述
RTC Module With 512Kx8 NVSRAM

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中文翻译

获取价格

数据手册

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BQ4850Y_13 数据手册

Not Recommended For New Designs

bq4850Y

RTC Module With 512Kx8 NVSRAM

The clock and alarm registers are

General Description

Features

du a l-por t r ea d/wr it e SRAM loca-

➤ I n t e gr a t e d S R AM , r e a l-t im e

clock, crystal, power-fail control

circuit, and battery

The bq4850Y RTC Module is a non-

volatile 4,194,304-bit SRAM organ-

ized as 524,288 words by 8 bits with

a n in t egr a l a ccessible r ea l-t im e

clock.

tions that are updated once per sec-

ond by a clock control circuit from

the internal clock counters. The

dual-port registers allow clock up-

dates to occur without interrupting

n or m a l a ccess t o t h e r est of t h e

SRAM array.

➤ Real-Time Clock counts seconds

through years in BCD format

The device combines an internal lith-

ium battery, quartz crystal, clock and

power-fail chip, and a full CMOS

SRAM in a plastic 32-pin DIP mod-

ule. The RTC Module directly re-

places industry-standard SRAMs and

also fits into many EPROM and EE-

PROM sockets without any require-

ment for special write timing or limi-

tations on the number of write cycles.

➤ RAM-like clock access

The bq4850Y also contains a power-

fail-detect circuit. The circuit dese-

lects the device whenever V_CCfalls

below tolerance, providing a high de-

gree of data security. The battery is

electrically isolated when shipped

from the factory to provide maxi-

mum battery capacity. The battery

remains disconnected until the first

➤ Pin-compatible with industry-

standard 512K x 8 SRAMs

➤ Unlimited write cycles

➤ 10-year minimum data retention

and clock operation in the absence

of power

➤ Automatic power-fail chip dese-

Registers for the rea l-time clock,

alarm and other special functions

are located in registers 7FFF8h–

7FFFFh of the memory array.

application of V_CC

lect and write-protection

➤ Soft wa r e clock ca libr a t ion for

gr e a t e r t h a n ±1 m in u t e p e r

month accuracy

Pin Connections

Pin Names

A₀–A₁₈

Address input

Chip enable

Write enable

Output enable

DQ₀–DQ₇Data in/data out

V_CC

V_SS

+5 volts

Ground

32-Pin DIP Module

PN485001.eps

SLUS057A- January 2005

12 3 4 5 6 7...17

中文翻译

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