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BD8112EFV-ME2 PDF预览

BD8112EFV-ME2

更新时间: 2024-02-24 18:40:10
品牌 Logo 应用领域
罗姆 - ROHM 驱动光电二极管接口集成电路
页数 文件大小 规格书
25页 671K
描述
LED Driver, 12-Segment, PDSO24, ROHS COMPLIANT, TSSOP-24

BD8112EFV-ME2 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:HVSSOP, TSSOP24,.3
针数:24Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.81接口集成电路类型:LED DISPLAY DRIVER
JESD-30 代码:R-PDSO-G24长度:7.8 mm
复用显示功能:NO功能数量:1
区段数:12端子数量:24
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HVSSOP
封装等效代码:TSSOP24,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
电源:12 V认证状态:Not Qualified
座面最大高度:1 mm子类别:Display Drivers
最大供电电压:30 V最小供电电压:5 V
标称供电电压:12 V表面贴装:YES
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5.6 mm
最小 fmax:0.6 MHzBase Number Matches:1

BD8112EFV-ME2 数据手册

 浏览型号BD8112EFV-ME2的Datasheet PDF文件第4页浏览型号BD8112EFV-ME2的Datasheet PDF文件第5页浏览型号BD8112EFV-ME2的Datasheet PDF文件第6页浏览型号BD8112EFV-ME2的Datasheet PDF文件第8页浏览型号BD8112EFV-ME2的Datasheet PDF文件第9页浏览型号BD8112EFV-ME2的Datasheet PDF文件第10页 
Technical Note  
BD8112EFV-M  
5V voltage reference (VREG)  
5V (Typ.) is generated from the VCC input voltage when the enable pin is set high. This voltage is used to power internal  
circuitry, as well as the voltage source for device pins that need to be fixed to a logical HIGH. UVLO protection is integrated  
into the VREG pin. The voltage regulation circuitry operates uninterrupted for output voltages higher than 4.45 V (Typ.),  
but if output voltage drops to 4.3 V (Typ.) or lower, UVLO engages and turns the IC off. Connect a capacitor (Creg = 2.2µF  
Typ.) to the VREG terminal for phase compensation. Operation may become unstable if Creg is not connected.  
Constant-current LED drivers  
If less than four constant-current drivers are used, unused channels should be switched off via the LEDEN pin configuration.  
The truth table for these pins is shown below. If a driver output is enabled but not used (i.e. left open), the IC’s open  
circuit-detection circuitry will operate. Please keep the unused pins open. The LEDEN terminals are pulled down internally  
in the IC, so if left open, the IC will recognize them as logic LO. However, they should be connected directly to VREG or  
fixed to a logic HI when in use.  
LED  
LED EN  
1
2
L
ON  
ON  
ON  
OFF  
H
Output current setting  
LED current is computed via the following equation:  
ILED = min[VDAC , VISET(=2.0V)] / RSET x GAIN [A]  
(min[VDAC , 2.0V] = the smaller value of either VDAC or VISET; GAIN = set by internal circuitry.)  
In applications where an external signal is used for output current control, a control voltage in the range of 0.0 to 2.0 V  
can be connected on the VDAC pin to control according to the above equation. If an external control signal is not used,  
connect the VDAC pin to VREG (do not leave the pin open as this may cause the IC to malfunction). Also, do not switch  
individual channels on or off via the LEDEN pin while operating in PWM mode.  
The following diagram illustrates the relation between ILED and GAIN.  
ILED vs GAIN  
3150  
3100  
3050  
3000  
2950  
2900  
2850  
0
20  
40  
60  
80  
100  
120  
140  
160  
ILED[mA]  
In PWM intensity control mode, the ON/OFF state of each current driver is controlled directly by the input signal on the  
PWM pin; thus, the duty ratio of the input signal on the PWM pin equals the duty ratio of the LED current. When not  
controlling intensity via PWM, fix the PWM terminal to a high voltage (100%). Output light intensity is greatest at 100%  
input.  
PWM  
PWM  
ILED  
ILED(50mA/div)  
PWM=150Hz Duty=50%  
PWM=150Hz Duty=0.  
www.rohm.com  
© 2010 ROHM Co., Ltd. All rights reserved.  
2011.08 - Rev.C  
7/22  

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