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BC2502A PDF预览

BC2502A

更新时间: 2024-03-03 10:10:46
品牌 Logo 应用领域
台湾合泰/盛群 - HOLTEK /
页数 文件大小 规格书
14页 623K
描述
Sub-1GHz Low-IF FSK RF Receiver

BC2502A 数据手册

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BC2502A/BC2502B  
Power on Reset Characteristics  
Ta=25°C  
Symbol  
VPOR  
Parameter  
Conditions  
Min.  
Typ. Max. Unit  
VDD Start Voltage to Ensure Power-on Reset  
VDD Rising Rate to Ensure Power-on Reset  
100  
mV  
RRPOR  
0.035  
V/ms  
Minimum Time for VDD Stays at VPOR to  
Ensure Power-on Reset  
tPOR  
1
ms  
VDD  
tPOR  
RRPOR  
VPOR  
Time  
Operation Modes  
Functional Description  
The devices provide four operation modes, power off  
mode, deep sleep mode, RX mode and configuration  
mode.  
The BC2502x devices are ultra-low power, high  
performance, low-cost FSK receivers suitable for use  
in wireless applications with a frequency of 315, 433,  
868, 915MHz respectively. The devices are formed by  
a low-IF receiver, followed by a FSK demodulator and  
a fractional-N synthesizer. They only require a crystal  
and a minimum number of passive components to  
implement a FSK receiver.  
In the deep sleep mode, there is less than 1µA of sleep  
mode leakage current with register data retention.  
In the RX Mode, the devices execute normal RX  
operations that receive incoming RF signals from the  
antenna and then output the demodulated data onto the  
DO/SDA pin. There are two types of RX mode, one is  
the Auto RX mode and the other is the sniff RX mode.  
FSK RF Receiver  
The BC2502x devices adopt a fully-integrated, low-  
IF receiver architecture. The received RF signal is first  
amplified by a low noise amplifier (LNA), after which  
the frequency is reduced to an intermediate frequency  
(IF). The IF signal is filtered by a channel-selected filter  
which rejects the unwanted out-of-band interference  
signals and image signal. After the BPF stage, the  
desired IF signal is amplified by the limiter amplifier  
which generates a received-signal-strength-indicator  
(RSSI) signal.  
In the Configuration Mode, the devices are operated  
as I2C slaves and are programmed by an external  
MCU. Users can select the desired RX channel  
by configuring the internal registers. After the  
configuration has completed, the devices will return to  
the deep sleep mode by setting the CFOMSD bit high.  
CFOMSD=1 & I2C stop  
Configuration  
Mode  
DO/SDA = Low, then  
SD/SCL H L  
The devices feature an automatic gain control (AGC)  
unit which adjusts the front-end gain according to  
the RSSI. The AGC can increase the dynamic range  
of the RSSI and enable the devices to receive a wide  
dynamic range RF signal.  
Power Off  
Deep Sleep  
DO/SDA = High, then  
SD/SCL H L  
RX Mode  
The FSK one/zero type data is generated by  
comparing the RSSI signal to a manipulated threshold.  
This threshold is crucial to the performance of  
FSK demodulation. The agile threshold detection  
mechanism can reduce glitches when there is no RF  
signal or when long zero data streams are received. It  
also includes a fast tracking threshold to offer good  
immunity from co-channel interferences.  
SD/SCL L H  
Operation Mode Switching  
Note: The CFOMSD bit will be cleared to zero  
automatically when the device leaves the  
configuration mode.  
Rev. 1.20  
5
December 05, 2022  

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