5秒后页面跳转
AZ100EL16VSTR2 PDF预览

AZ100EL16VSTR2

更新时间: 2024-09-19 23:15:59
品牌 Logo 应用领域
其他 - ETC /
页数 文件大小 规格书
8页 181K
描述
ECL/PECL Differential Receiver with Variable Output Swing

AZ100EL16VSTR2 数据手册

 浏览型号AZ100EL16VSTR2的Datasheet PDF文件第2页浏览型号AZ100EL16VSTR2的Datasheet PDF文件第3页浏览型号AZ100EL16VSTR2的Datasheet PDF文件第4页浏览型号AZ100EL16VSTR2的Datasheet PDF文件第5页浏览型号AZ100EL16VSTR2的Datasheet PDF文件第6页浏览型号AZ100EL16VSTR2的Datasheet PDF文件第7页 
ARIZONA MICROTEK, INC.  
AZ100EL16VS  
ECL/PECL Differential Receiver with Variable Output Swing  
PACKAGE AVAILABILITY  
FEATURES  
PACKAGE  
MLP 8  
PART NO.  
MARKING  
AZM16P  
250ps Propagation Delay  
AZ100EL16VSL  
High Bandwidth Output Transitions  
75kInternal Input Pulldown Resistors  
Functionally Equivalent to ON  
Semiconductor MC100EL16  
Variable Output Swing  
MLP 8 T&R  
MLP 8 T&R  
SOIC 8  
AZ100EL16VSLR1 AZM16P  
AZ100EL16VSLR2 AZM16P  
AZ100EL16VSD  
AZM100EL16VS  
SOIC 8 T&R  
SOIC 8 T&R  
TSSOP 8  
AZ100EL16VSDR1 AZM100EL16VS  
AZ100EL16VSDR2 AZM100EL16VS  
Available in a 3x3mm MLP Package  
AZ100EL16VST  
AZH16VS  
TSSOP 8 T&R AZ100EL16VSTR1 AZH16VS  
TSSOP 8 T&R AZ100EL16VSTR2 AZH16VS  
DESCRIPTION  
The AZ100EL16VS is a differential receiver with variable output swing. The EL16VS has functionality and  
output transition times similar to the EL16, with an input that controls the amplitude of the Q/Q¯ outputs. Maximum  
swing is achieved by leaving the VCTRL pin open or tied to VEE.  
The operational range of the EL16VS control input, VCTRL, is from VBB (full swing) to VCC (min. swing).  
Simple control of the output swing can be obtained by a variable resistor between the VBB and VCC pins, with the  
wiper driving VCTRL. Typical application circuits and results are described in this Data Sheet.  
The EL16VS provides a VBB output for single-ended use or a DC bias reference for AC coupling to the device.  
For single-ended input applications, the VBB reference should be connected to one side of the D/D¯ differential input  
pair. The input signal is then fed to the other D/D¯ input. The VBB pin can support 1.0mA sink/source current.  
When used, the VBB pin should be bypassed to ground via a 0.01µF capacitor.  
Under open input conditions (pulled to VEE) internal input clamps will force the Q output LOW.  
NOTE: Specifications in ECL/PECL tables are valid when thermal equilibrium is established.  
1630 S. STAPLEY DR., SUITE 125 MESA, ARIZONA 85204 USA (480) 962-5881 FAX (480) 890-2541  
www.azmicrotek.com  

与AZ100EL16VSTR2相关器件

型号 品牌 获取价格 描述 数据表
AZ100EL31 AZM

获取价格

ECL/PECL D Flip-Flop with Set and Reset
AZ100EL31D AZM

获取价格

ECL/PECL D Flip-Flop with Set and Reset
AZ100EL31DR1 ETC

获取价格

ECL/PECL D Flip-Flop with Set and Reset
AZ100EL31DR2 ETC

获取价格

ECL/PECL D Flip-Flop with Set and Reset
AZ100EL31T AZM

获取价格

ECL/PECL D Flip-Flop with Set and Reset
AZ100EL31TR1 ETC

获取价格

ECL/PECL D Flip-Flop with Set and Reset
AZ100EL31TR2 ETC

获取价格

ECL/PECL D Flip-Flop with Set and Reset
AZ100EL32 AZM

获取价格

ECL/PECL ± 2 Divider
AZ100EL32D AZM

获取价格

ECL/PECL ± 2 Divider
AZ100EL32D+ AZM

获取价格

ECL/PECL ± 2 Divider