Datasheet > AVCE6467T

AVCE6467T

更新时间： 2022-04-26 09:22:47

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
352页	2060K
描述
VCE6467T, AVCE6467T Digital Media System-on-Chip

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AVCE6467T 数据手册

VCE6467T, AVCE6467T

www.ti.com

SPRS690–MARCH 2011

1.3 Functional Block Diagram

Figure 1-1 shows the functional block diagram of the device.

JTAG Interface

System Control

ARM Subsystem

DSP Subsystem

High Definition

Video-Imaging

Coprocessor

(HDVICP0)

Input

Clock(s)

PLLs/Clock

Generator

ARM926EJ-S CPU

C64x™ DSP CPU

128 KB L2 RAM

16 KB

I-Cache

8 KB

D-Cache

Power/Sleep

Controller

High Definition

Video-Imaging

Coprocessor

(HDVICP1)

32 KB

L1 Pgm

32 KB

L1 Data

32 KB RAM

8 KB ROM

Multiplexing

Switched Central Resource (SCR)

Peripherals

Serial Interfaces

System

General-

Purpose

Timer

Watchdog

Timer

EDMA

I2C

SPI

McASP

PWM

UART

CRGEN

VDCE

Connectivity

Program/Data Storage

EMAC

With

MDIO

DDR2

Mem Ctlr

(16b/32b)

Async EMIF/

NAND/

SmartMedia

USB 2.0

PHY

Video

Port I/F

PCI

(66 MHz)

VLYNQ

HPI

ATA

TSIF

Figure 1-1. VCE6467T Functional Block Diagram

Digital Media System-on-Chip (DMSoC)

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