Features
• 3.0V to 3.6V Operating Range
• Advanced, High-speed, Electrically-erasable Programmable Logic Device
– Superset of 22V10
– Enhanced Logic Flexibility
– Architecturally Compatible with ATV750B and ATV750 Software and Hardware
• D- or T-type Flip-flop
• Product Term or Direct Input Pin Clocking
• 15 ns Maximum Pin-to-pin Delay with 3V Operation
• Highest Density Programmable Logic Available in 24-pin Package
– Advanced Electrically-erasable Technology
– Reprogrammable
– 100% Tested
• Increased Logic Flexibility
High-speed
Complex
Programmable
Logic Device
– 42 Array Inputs, 20 Sum Terms and 20 Flip-flops
• Enhanced Output Logic Flexibility
– All 20 Flip-flops Feed Back Internally
– 10 Flip-flops are also Available as Outputs
• Programmable Pin-keeper Circuits
• Dual-in-line and Surface Mount Package in Standard Pinouts
• Commercial and Industrial Temperature Ranges
• 20-year Data Retention
ATF750LVC
• 2000V ESD Protection
• 1000 Erase/Write Cycles
Block Diagram
(OE PRODUCT TERMS)
PROGRAMMABLE
INTERCONNECT
AND
COMBINATORIAL
LOGIC ARRAY
12
INPUT
PINS
LOGIC
OPTION
4 TO 8
PRODUCT
TERMS
10
I/O
PINS
OUTPUT
OPTION
(UP T0 20
FLIP-FLOPS)
(CLOCK PIN)
Description
The Atmel “750” architecture is twice as powerful as most other 24-pin programmable
logic devices. Increased product terms, sum terms, flip-flops and output logic configu-
rations translate into more usable gates. High-speed logic and uniform, predictable
delays guarantee fast in-system performance. The ATF750LVC is a high-performance
(continued)
Pin Configurations
Pin Name Function
DIP/SOIC/TSSOP
PLCC
CLK/IN
IN
1
2
3
4
5
6
7
8
9
24 VCC
23 I/O
22 I/O
21 I/O
20 I/O
19 I/O
18 I/O
17 I/O
16 I/O
15 I/O
14 I/O
13 IN
CLK
IN
Clock
IN
IN
IN
5
6
7
8
9
25 I/O
24 I/O
23 I/O
22 GND *
21 I/O
20 I/O
19 I/O
Logic Inputs
Bi-directional Buffers
Ground
IN
IN
IN
I/O
IN
GND *
IN
IN
GND
IN
IN 10
IN 11
IN
IN 10
IN 11
VCC
3V Supply
Note:
For PLCC, pins 1, 8, 15, and 22
can be left unconnected. For
superior performance, connect
VCC to pin 1 and GND to pins
8, 15, and 22.
GND 12
Rev. 1447D–03/01
1