Datasheet > ATF860S12B

ATF860S12B

更新时间： 2024-11-25 01:16:31

品牌	Logo	应用领域
POSEICO		开关
页数	文件大小	规格书
3页	85K
描述
FAST SWITCHING THYRISTOR

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中文翻译

获取价格

数据手册

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ATF860S12B 数据手册

POSEICO SPA

Via N. Lorenzi 8, 16152 Genova - ITALY

Tel. +39 010 6556234 - Fax +39 010 6557519

Sales Office:

POSEICO

POSEICO SPA

POwer SEmiconductors Italian COrporation

Tel. +39 010 6556775 - Fax +39 010 6445141

FAST SWITCHING THYRISTOR

ATF860

Repetitive voltage up to

Mean on-state current

Surge current

1200 V

730 A

8 kA

FINAL SPECIFICATION

Turn-off time

15 µs

mag 06 - ISSUE : 05

Symbol

Characteristic

Conditions

Value

Unit

[°C]

BLOCKING

V RRM

V RSM

V DRM

I RRM

I DRM

Repetitive peak reverse voltage

Non-repetitive peak reverse voltage

Repetitive peak off-state voltage

Repetitive peak reverse current

Repetitive peak off-state current

125

1200

1300

1200

V=VRRM

V=VDRM

CONDUCTING

I T (AV)

I TSM

I² t

Mean on-state current

Surge on-state current, non repetitive

I² t

180°sin, 50 Hz, Th=55°C, double side cooled

180°sin, 1 kHz, Th=55°C, double side cooled

sine wave, 10 ms

730

655

125

7,5

without reverse voltage

281 x1E3

2,38

A²s

V T

On-state voltage

On-state current =

1000 A

T(TO)

Threshold voltage

125

1,64

r T

On-state slope resistance

125 0,520

mohm

SWITCHING

di/dt

dv/dt

Critical rate of rise of on-state current, min

Critical rate of rise of off-state voltage, min

Gate controlled delay time, typical

From 75% VDRM up to 1200 A, gate 20V 10 ohm

Linear ramp up to 70% of VDRM

125

400

500

0,6

A/µs

V/µs

µs

VD=100V, gate source 20V, 10 ohm , tr=1 µs

Circuit commutated turn-off time

di/dt = 20

dV/dt = 200 V/µs , up to 75% VDRM

di/dt = 60 A/µs, I I = 1000

VR = 50

A/µs, I I = 400

125

µs

Q rr

I rr

I H

Reverse recovery charge

Peak reverse recovery current

Holding current, typical

125

250

140

µC

VD=5V, gate open circuit

VD=12V, tp=30µs

I L

Latching current, typical

GATE

V GT

I GT

Gate trigger voltage

VD=5V

125

3,5

350

0,25

Gate trigger current

VD=5V

V GD

Non-trigger gate voltage, min.

Peak gate voltage (forward)

Peak gate current

VD=VDRM

FGM

RGM

Peak gate voltage (reverse)

Peak gate power dissipation

Average gate power dissipation

Pulse width 100 µs

150

G(AV)

MOUNTING

R th(j-h)

Thermal impedance, DC

Junction to heatsink, double side cooled

°C/kW

°C

Operating junction temperature

Mounting force

-30 / 125

11.0 / 13.0

290

Mass

tq code

D 10 µs C 12 µs B 15 µs A 20 µs L 25 µs

M 30 µs N 35 µs P 40 µs R 45 µs S 50 µs

T 60 µs U 70 µs W 80 µs X 100µs Y 150µs

tq code

ORDERING INFORMATION : ATF860 S 12 B

VDRM&VRRM/100

standard specification

12 3

中文翻译

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