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ATF1504ASL-25AU44 PDF预览

ATF1504ASL-25AU44

更新时间: 2024-11-01 20:28:35
品牌 Logo 应用领域
美国微芯 - MICROCHIP 时钟ATM异步传输模式输入元件可编程逻辑
页数 文件大小 规格书
33页 378K
描述
IC CPLD 64MC 25NS 44TQFP

ATF1504ASL-25AU44 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active包装说明:TQFP, TQFP44,.47SQ,32
Reach Compliance Code:compliantFactory Lead Time:12 weeks
风险等级:1.44Is Samacsys:N
其他特性:POWER -UP RESET; SECURITY FUSE最大时钟频率:60 MHz
系统内可编程:YESJESD-30 代码:S-PQFP-G44
JESD-609代码:e3JTAG BST:YES
长度:10 mm湿度敏感等级:3
专用输入次数:I/O 线路数量:32
输入次数:32宏单元数:64
输出次数:32产品条款数:40
端子数量:44最高工作温度:85 °C
最低工作温度:-40 °C组织:0 DEDICATED INPUTS, 32 I/O
输出函数:MACROCELL封装主体材料:PLASTIC/EPOXY
封装代码:TQFP封装等效代码:TQFP44,.47SQ,32
封装形状:SQUARE封装形式:FLATPACK, THIN PROFILE
峰值回流温度(摄氏度):260可编程逻辑类型:EE PLD
传播延迟:25 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.8 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:10 mmBase Number Matches:1

ATF1504ASL-25AU44 数据手册

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Features  
High-density, High-performance, Electrically-erasable Complex Programmable  
Logic Device  
– 64 Macrocells  
– 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell  
– 44, 68, 84, 100 Pins  
– 7.5 ns Maximum Pin-to-pin Delay  
– Registered Operation up to 125 MHz  
– Enhanced Routing Resources  
In-System Programmability (ISP) via JTAG  
Flexible Logic Macrocell  
High-  
performance  
Complex  
Programmable  
Logic Device  
– D/T/Latch Configurable Flip-flops  
– Global and Individual Register Control Signals  
– Global and Individual Output Enable  
– Programmable Output Slew Rate  
– Programmable Output Open Collector Option  
– Maximum Logic Utilization by Burying a Register with a COM Output  
Advanced Power Management Features  
– Automatic µA Standby for “L” Version  
– Pin-controlled 1 mA Standby Mode  
– Programmable Pin-keeper Circuits on Inputs and I/Os  
– Reduced-power Feature per Macrocell  
Available in Commercial and Industrial Temperature Ranges  
Available in 44-, 68-, and 84-lead PLCC; 44- and 100-lead TQFP; and 100-lead PQFP  
Advanced EE Technology  
ATF1504AS  
– 100% Tested  
– Completely Reprogrammable  
– 10,000 Program/Erase Cycles  
ATF1504ASL  
– 20-year Data Retention  
– 2000V ESD Protection  
– 200 mA Latch-up Immunity  
JTAG Boundary-scan Testing to IEEE Std. 1149.1-1990 and 1149.1a-1993 Supported  
PCI-compliant  
3.3V or 5.0V I/O Pins  
Security Fuse Feature  
Enhanced Features  
Improved Connectivity (Additional Feedback Routing, Alternate Input Routing)  
Output Enable Product Terms  
Transparent – Latch Mode  
Combinatorial Output with Registered Feedback within Any Macrocell  
Three Global Clock Pins  
ITD (Input Transition Detection) Circuits on Global Clocks, Inputs and I/O  
Fast Registered Input from Product Term  
Programmable “Pin-keeper” Option  
VCC Power-up Reset Option  
Pull-up Option on JTAG Pins TMS and TDI  
Advanced Power Management Features  
– Edge-controlled Power-down “L”  
– Individual Macrocell Power Option  
– Disable ITD on Global Clocks, Inputs and I/O  
Rev. 0950N–PLD–07/02  

ATF1504ASL-25AU44 替代型号

型号 品牌 替代类型 描述 数据表
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