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ATF1504AS-10JU84 PDF预览

ATF1504AS-10JU84

更新时间: 2024-02-27 09:12:38
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程逻辑器件
页数 文件大小 规格书
35页 683K
描述
Highperformance Complex Programmable Logic Device

ATF1504AS-10JU84 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:QCCJ, LDCC44,.7SQ
Reach Compliance Code:compliantFactory Lead Time:12 weeks
风险等级:1.72其他特性:POWER -UP RESET; SECURITY FUSE
最大时钟频率:125 MHz系统内可编程:YES
JESD-30 代码:S-PQCC-J84JTAG BST:YES
长度:29.3116 mm专用输入次数:
I/O 线路数量:32输入次数:32
宏单元数:64输出次数:32
产品条款数:40端子数量:84
最高工作温度:85 °C最低工作温度:-40 °C
组织:0 DEDICATED INPUTS, 64 I/O输出函数:MACROCELL
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC44,.7SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):NOT SPECIFIED
可编程逻辑类型:EE PLD传播延迟:10 ns
认证状态:Not Qualified座面最大高度:4.57 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:29.3116 mmBase Number Matches:1

ATF1504AS-10JU84 数据手册

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Programming  
ATF1504AS devices are in-system programmable (ISP) devices utilizing the 4-pin JTAG  
protocol. This capability eliminates package handling normally required for programming  
and facilitates rapid design iterations and field changes.  
Atmel provides ISP hardware and software to allow programming of the ATF1504AS via  
the PC. ISP is performed by using either a download cable or a comparable board tester  
or a simple microprocessor interface.  
To facilitate ISP programming by the Automated Test Equipment (ATE) vendors. Serial  
Vector Format (SVF) files can be created by Atmel provided software utilities.  
ATF1504AS devices can also be programmed using standard third-party programmers.  
With third-party programmer, the JTAG ISP port can be disabled thereby allowing  
four additional I/O pins to be used for logic.  
Contact your local Atmel representatives or Atmel PLD applications for details.  
ISP Programming  
Protection  
The ATF1504AS has a special feature that locks the device and prevents the inputs and  
I/O from driving if the programming process is interrupted for any reason. The inputs  
and I/O default to high-Z state during such a condition. In addition the pin-keeper option  
preserves the former state during device programming, if this circuit were previously  
programmed on the device. This prevents disturbing the operation of other circuits in the  
system while the ATF1504AS is being programmed via ISP.  
All ATF1504AS devices are initially shipped in the erased state thereby making them  
ready to use for ISP.  
Note:  
For more information refer to the “Designing for In-System Programmability with Atmel  
CPLDs” application note.  
10  
ATF1504AS(L)  
0950O–PLD–7/05  

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